HD6417705 Datasheet, PDF (708/739 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7700 Series

CKIO
A25 to A0
Tp Tpw Trr Trc
PALL
t_AD1
REF
t_AD1
A12/A11^*1
CSn
RD/WR
RASU/L
CASU/L
t_CSD1 t_CSD1 t_CSD1 t_CSD1
t_RWD1 t_RWD1
t_RASD1 t_RASD1 t_RASD1 t_RASD1
t_CASD1 t_CASD1
DQMxx
D31 to D0
Trc Trr Trc
REF
t_CSD1 t_CSD1
t_RASD1 t_RASD1
t_CASD1 t_CASD1
(Hi-Z)
Trc Tmw Tde
MRS
t_AD1
t_AD1
t_AD1
t_CSD1 t_CSD1
t_RWD1 t_RWD1 ^tRWD1
t_RASD1 t_RASD1
t_CASD1 t_CASD1
BS
CKE
DACKn^*2
Notes: 1. Address pin to be connected to A10 of SDRAM.
2. DACKn is a waveform when active-low is specified.
Figure 25.38 Synchronous DRAM Mode Register Write Timing (TRP = 2 Cycle)
Rev. 2.00, 09/03, page 662 of 690