XRT72L50 Datasheet, PDF (77/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

áç
XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
Bit 3 - OOF (Out of Frame) Interrupt Enable
This Read/Write bit field allows the user to enable or disable the Change in Out-of-Frame (OOF) status
interrupt. Setting this bit-field to "1" enables this interrupt. Setting this bit-field to "0" disables this interrupt.
NOTE: For more information on the OOF Condition, refer to Section 6.3.2.1.
Bit 2 - LOF (Loss of Frame) Interrupt Enable
This Read/Write bit-field allows the user to enable or disable the Change in Loss-of-Frame (LOF) status
interrupt. Setting this bit-field to "1" enables this interrupt. Setting this bit-field to "0" disables this interrupt.
NOTE: For more information on the LOF Condition see Section 6.3.2.1.
Bit 1 - LOS (Loss of Signal) Interrupt Enable
This Read/Write bit-field allows the user to enable or disable the Change in LOS condition interrupt. Setting
this bit-field to "1" enables this interrupt. Setting this bit-field to "0" disables this interrupt.
NOTE: For more information on the LOS Condition see Section 6.3.2.6.
Bit 0 - AIS Interrupt Enable
This Read/Write bit-field allows the user to enable or disable the Change in AIS condition interrupt. Setting this
bit-field to "1" enables this interrupt. Setting this bit-field to "0" disables this interrupt.
NOTE: For more information on the AIS Condition see Section 6.3.2.6.2.
2.3.3.4 Receive E3 Interrupt Enable Register 2 (E3, ITU-T G.832)
RxE3 Interrupt Enable Register 2 (Address = 0x13)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Not Used
TTB
Change
Interrupt
Enable
Not Used
FEBE
Interrupt
Enable
FERF
Interrupt
Enable
BIP-8
Error Interrupt
Enable
Framing
Byte Error
Interrupt
Enable
RxPld
Mis
Interrupt
Enable
RO
R/W
RO
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
Bit 6 - TTB Change Interrupt Enable
This Read/Write bit-field allows the user to enable or disable the Change in Trail Trace Buffer Message
interrupt. Setting this bit-field to "1" enables this interrupt. Setting this bit-field to "0" disables this interrupt.
NOTE: For more information on Trail Trace Buffer messages see Section 6.3.2.9.
Bit 4 - FEBE (Far-End Block Error) Interrupt Enable
This Read/Write bit-field allows the user to enable or disable the Far-End-Block Error (FEBE) interrupt. Setting
this bit-field to "1" enables this interrupt. Setting this bit-field to "0" disables this interrupt.
NOTE: For more information on the FEBE Interrupt condition see Section 6.3.6.2.8.
Bit 3 - FERF (Far-End Receive Failure) Interrupt Enable
This Read/Write bit-field allows the user to enable or disable the Change in FERF Condition interrupt. Setting
this bit-field to "1" enables this interrupt. Setting this bit-field to "0" disables this interrupt.
NOTE: For more information on the Change in FERF Condition interrupt see Section 6.3.6.2.7.
Bit 2 - BIP-8 Error Interrupt Enable
This Read/Write bit-field allows the user to enable or disable the BIP-8 interrupt. Setting this bit-field to "1"
enables this interrupt. Setting this bit-field to "0" disables this interrupt.
NOTE: For more information on this interrupt see Section 6.3.6.2.9.
Bit 1 - Framing Byte Error Interrupt Enable
This Read/Write bit-field allows the user to enable or disable the Framing Byte Error interrupt. Setting this bit-
field to "1" enables this interrupt. Setting this bit-field to "0" disables this interrupt.
64