XRT72L50 Datasheet, PDF (155/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
The Transmit Section of the XRT72L50 uses the TxInClk signal as its timing reference and initiates DS3 frame
generation asynchronously with respect to any externally applied signal. The XRT72L50 pulses its TxFrame
output pin "High" whenever it is processing the very last bit-field within a given DS3 frame.
Sampling of payload data from the Terminal Equipment
In Mode 3, the XRT72L50 samples the data at the TxSer input pin on the rising edge of TxInClk.
Interfacing the Transmit Payload Data Input Interface block of the XRT72L50 to the Terminal Equipment
for Mode 3 Operation
This is illustrated in Figure 36.
FIGURE 36. THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA INPUT INTERFACE
BLOCK FOR MODE 3 (SERIAL/LOCAL-TIMED/FRAME-MASTER) OPERATION
DS3_Clock_In
D S 3_D a ta_O u t
T x_S tart_of_F ram e
D S 3_O v erhead_Ind
44.736M H z
Clock Source
T x In C lk
TxSer
TxFram e
T xO H _Ind
N ib In tf
Term inal Equipm ent
DS3 Fram er
Mode 3 Operation of the Terminal Equipment
In Figure 36, both the Terminal Equipment and the XRT72L50 are driven by an external 44.736MHz clock
signal. This clock signal is connected to the DS3_Clock_In input pin of the Terminal Equipment and the
TxInClk input pin of the XRT72L50.
The Terminal Equipment serially outputs the payload data on its DS3_Data_Out output pin upon the rising
edge of the signal at the DS3_Clock_In input pin. The XRT72L50 latches the data residing on the TxSer input
pin on the rising edge of TxInClk.
The XRT72L50 pulses the TxFrame output pin "High" for one bit-period coincident while it is processing the last
bit-field within a given outbound DS3 frame. The Terminal Equipment is expected to monitor the TxFrame
signal from the XRT72L50 and to place the first bit within the very next outbound DS3 frame on the TxSer input
pin.
In this case, the XRT72L50 dictates exactly when the very next DS3 frame is generated.
The Terminal Equipment is expected to respond appropriately by providing the XRT72L50 with the first bit of
the new DS3 frame upon demand. In this mode the XRT72L50 is referred to as the Frame Master and the
Terminal Equipment is referred to as the Frame Slave.
Finally, the XRT72L50 pulses its TxOH_Ind output pin one bit-period prior to it processing a given overhead bit
within the outbound DS3 frame. Since the TxOH_Ind output pin of the XRT72L50 is electrically connected to
the DS3_Overhead_Ind whenever the XRT72L50 pulses the TxOH_Ind output pin "High", it also drives the
DS3_Overhead_Ind input pin of the Terminal Equipment "High". Whenever the Terminal Equipment detects
this pin toggling "High", it should delay transmission of the very next DS3 frame payload bit by one clock cycle.
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