XRT72L50 Datasheet, PDF (372/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
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Finally, the XRT72L50 will always internally generate the Overhead bits, when it is operating in both the E3 and
Nibble-parallel modes. The XRT72L50 will pull the TxOHInd input pin "Low".
The behavior of the signals between the XRT72L50 and the Terminal Equipment for E3 Mode 6 Operation is
illustrated in Figure 156.
FIGURE 156. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE XRT72L50 AND THE TERMINAL
EQUIPMENT (E3 MODE 6 OPERATION)
Terminal Equipment Signals
TxInClk
E3_Nib_Clock_In
E3_Data_Out[3:0]
Tx_Start_of_Frame
E3_Overhead_Ind
Payload Nibble [1059]
Overhead Nibble [0]
XRT72L5x Transmit Payload Data I/F Signals
TxInClk
TxNibClk
TxNib[3:0]
TxNibFrame
Nibble [1059]
Overhead Nibble [0]
TxOH_Ind
Note: TxNibFrame pulses high to denote
E3 Frame Boundary.
E3 Frame Number N
E3 Frame Number N + 1
TxOH_Ind pulses high for 4 Nibble periods
How to configure the XRT72L50 into Mode 6
1. Set the NibIntfinput pin "High".
2. Set the TimRefSel[1:0] bit-fields (within the Framer Operating Mode Register) to "1X" as illustrated below.
Framer Operating Mode Register (Address = 0x00)
BIT 7
Local Loop-back
BIT 6
DS3/E3*
R/W
R/W
0
0
BIT 5
Internal LOS
Enable
R/W
1
BIT 4
RESET
R/W
0
BIT 3
BIT2
Interrupt Frame Format
Enable Reset
R/W
R/W
1
1
BIT 1
BIT 0
TimRefSel[1:0]
R/W
R/W
1
x
3. Interface the XRT72L50, to the Terminal Equipment, as illustrated in Figure 155.
6.2.2 The Transmit Overhead Data Input Interface
Figure 157 presents a simple illustration of the Transmit Overhead Data Input Interface block within the
XRT72L50.
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