XRT72L50 Datasheet, PDF (16/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. 1.2.1
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PIN DESCRIPTIONS
PIN DESCRIPTION
PIN #
1
2
3
4
5
6
PIN NAME
TDO
TDI
VDD
TRST
GND
RDY_DTCK
7
WR_R/W
8
CS
9
ALE_AS
TYPE
O
I
****
I
****
O
I
I
I
DESCRIPTION
Test Data Out: Boundary Scan test data output.
Test Data In: Boundary Scan Test data input.
Power Supply 3.3V + 5%
JTAG Reset Pin: Resets Boundary Scan Logic.
Ground
READY or DTACK:
This active-low output pin will function as the READY output, when the micro-
processor interface is running in the Intel Mode; and will function as the
DTACK output, when the microprocessor interface is running in the Motorola
Mode.
Intel Mode - READY Output:
When the Framer negates this output pin (e.g., toggles it "Low"), it indicates
(to the µP) that the current READ or WRITE cycle is completed.
Motorola Mode - DTACK (Data Transfer Acknowledge) Output:
The Framer device will assert this pin in order to inform the local microproces-
sor that the present READ or WRITE cycle is nearly complete. If the Framer
device requires that the current READ or WRITE cycle be extended, then the
Framer will delay its assertion of this signal. The 68000 family of µPs requires
this signal from its peripheral devices, in order to quickly and properly com-
plete a READ or WRITE cycle.
Write Data Strobe (Intel Mode):
If the microprocessor interface is operating in the Intel Mode, then this active-
low input pin functions as the WR (Write Strobe) input signal from the µP.
Once this active-low signal is asserted, then the Framer will latch the contents
of the µP Data Bus, into the addressed register (or RAM location) within the
Framer IC. In the Intel Mode, data gets latched on the rising edge of WR
R/W Input Pin (Motorola Mode):
When the Microprocessor Interface is operating in the Motorola Mode, this pin
is functionally equivalent to the R/W pin. In the Motorola Mode, a READ oper-
ation occurs if this pin is at a logic "1". Similarly, a WRITE operation occurs if
this pin is at a logic "0".
Chip Select Input:
This active-low input signal selects the Microprocessor Interface Section of
the Framer device and enables READ/WRITE operations between the Local
Microprocessor and the Framer on-chip registers and RAM locations.
Address Latch Enable/Address Strobe:
This input is used to latch the address (present at the Microprocessor Inter-
face Address Bus, A(8:0)) into the Framer Microprocessor Interface circuitry
and to indicate the start of a READ/WRITE cycle. This input is active-high in
the Intel Mode (MOTO = "Low") and active-low in the Motorola Mode (MOTO
= "High").
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