English
Language : 

XRT72L50 Datasheet, PDF (18/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. 1.2.1
áç
PIN DESCRIPTION
PIN #
25
PIN NAME
NibIntf
26
GND
27
MOTO
28
Reset
29
TestMode
30
VDD
31
GND
32
D(0)
33
D(1)
34
D(2)
35
D(3)
36
D(4)
TYPE
I
****
I
I
***
****
****
I/O
I/O
I/O
I/O
I/O
DESCRIPTION
Nibble Interface Select Input Pin:
This input pin allows the user to configure the Transmit Payload Data Input
Interface and the Receive Payload Data Output Interface to operate in either
the Serial-Mode or the Nibble/Parallel-Mode.
Setting this input pin "High" configures the Transmit and Receive Terminal
Interfaces to operate in the Nibble/Parallel-Mode. In this mode, the Transmit
Payload Data Input Interface block will accept the outbound payload data
(from the Terminal Equipment) in a nibble-parallel manner via the TxNib[3:0]
input pins. Further, the Receive Payload Data Output Interface block will out-
put the inbound payload data (to the Terminal Equipment) in a nibble-parallel
manner via the RxNib[3:0] output pin. HDLC mode of operation requires Nib-
ble/Parallel mode setup.
Setting this input pin "Low" configures the Transmit and Receive Terminal
Interfaces to operate in the Serial Mode. In this mode, the Transmit Payload
Data Input Interface block will accept the outbound payload data (from the
Terminal Equipment) in a serial manner via the TxSer input pin. Further, the
Receive Payload Data Output Interface block will output the inbound payload
data (to the Terminal Equipment) in a serial manner via the RxSer output pin.
Ground
Motorola/Intel Processor Interface Select Mode:
This input pin allows the user to configure the Microprocessor Interface to
interface with either a Motorola-type or Intel-type microprocessor/microcon-
troller. Tying this input pin to VCC, configures the microprocessor interface to
operate in the Motorola mode (e.g., the Framer device can be readily inter-
faced to a Motorola type local microprocessor). Tying this input pin to GND
configures the Microprocessor Interface to operate in the Intel Mode (e.g., the
Framer device can be readily interfaced to a Intel type local microprocessor).
Reset Input:
When this active-low signal is asserted, the Framer device will be asynchro-
nously reset. Additionally, all outputs will be tri-stated, and all on-chip regis-
ters will be reset to their default values.
Factory Test Pin:
The user should tie this pin to Ground.
Power Supply 3.3V + 5%
Ground
Bit 0 of Bi-Directional Data Bus (Microprocessor Interface Section):
See description of pin 39 D(7)
Bit 1 of Bi-Directional Data Bus (Microprocessor Interface Section):
See description of pin 39 D(7)
Bit 2 of Bi-Directional Data Bus (Microprocessor Interface Section):
See description of pin 39 D(7)
Bit 3 of Bi-Directional Data Bus (Microprocessor Interface Section):
See description of pin 39 D(7)
Bit 4 of Bi-Directional Data Bus (Microprocessor Interface Section):
See description of pin 39 D(7)
5