XRT72L50 Datasheet, PDF (59/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
TABLE 4: REGISTER ADDRESSING OF THE FRAMER PROGRAMMER REGISTERS
ADDRESS
REGISTER NAME
POWER UP
DEFAULT VALUE
HEX
DEFAULT VALUE
REGISTER TYPE
0x6E LCV One-Second Accumulator Register - MSB
b00000000
0x00
RO
0x6F
LCV One-Second Accumulator Register - LSB
b00000000
0x00
RO
0x70
Frame Parity Error One-Second Accumulator
b00000000
0x00
RO
Register - MSB (BIP-8 in G.832)
0x71
Frame Parity Error One-Second Accumulator
b00000000
0x00
RO
Register - LSB (BIP-8 in G.832)
0x72
Frame CP Bit Error - One-Second Accumulator
b00000000
0x00
RO
Register - MSB
0x73
Frame CP Bit Error - One-Second Accumulator
b00000000
0x00
RO
Register - LSB
0x74 - 0x7F Reserved
0x80
Line Interface Drive Register (XRT72L50)
b00000000
0x00
R/W
0x81
Line Interface Scan Register
b00000000
0x00
RO
0x82
HDLC Control Register
b00000100
0x04
R/W
0x83 - 0x85 Reserved
0x86 - 0xDD Transmit LAPD Message Buffer (RAM)
bxxxxxxx
R/W
0xDE - 0x135 Receive LAPD Message Buffer (RAM)
bxxxxxxx
R/W
2.3.2 Framer Register Description
2.3.2.1 Operating Mode Register
Operating Mode Register (Address = 0x00)
BIT 7
BIT 6
BIT 5
BIT 4
Local Loop-back
DS3/E3
Internal RESET
LOS Enable
R/W
R/W
R/W
R/W
0
0
1
0
BIT 3
Interrupt
Enable Reset
R/W
1
BIT 2
Frame Format
R/W
0
BIT 1
BIT 0
TimRefSel[1:0]
R/W
R/W
1
1
Bit 7 - Local Loop-back Mode
This Read/Write bit-field permits the user to command the Framer chip to operate in the Local Loopback Mode.
Setting this bit-field to "0", configures the Framer chip to operate in the Normal Mode. Setting this bit-field to
"1", configures the Framer chip to operate in the Local-Loopback Mode.
NOTE: For more information of the Local Loop-back Mode, refer to Section 7.0.
Bit 6 - DS3/E3 select
This Read/Write bit-field permits the user to command the Framer chip to operate in either the DS3 Mode or
the E3 Mode.
Setting this bit-field to "0", configures the Framer chip to operate in the E3 Mode. Setting this bit-field to "1",
configures the Framer chip to operate in the DS3 Mode.
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