XRT72L50 Datasheet, PDF (410/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
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6.3.1.2.1
AMI Decoding
AMI or Alternate Mark Inversion, means that consecutive "one's" pulses (or marks) will be of opposite polarity
with respect to each other. This line code involves the use of three different amplitude levels: +1, 0, and -1.
The +1 and -1 amplitude signals are used to represent one's (or mark) pulses and the "0" amplitude pulses (or
the absence of a pulse) are used to represent zeros (or space) pulses. The general rule for AMI is: if a given
mark pulse is of positive polarity, then the very next mark pulse will be of negative polarity and vice versa. This
alternating-polarity relationship exists between two consecutive mark pulses, independent of the number of
zeros that exist between these two pulses. Figure 177 presents an illustration of the AMI Line Code as would
appear at the RxPOS and RxNEG pins of the Framer, as well as the output signal on the line.
FIGURE 177. ILLUSTRATION OF AMI LINE CODE
Data 1 0 1 1 0 0 0 1 0 1 1 1 1 0 1 1 0 1 1 0 0 1 1 0 0 0 0 1
Line Signal
RxPOS
RxNEG
NOTE: One of the reasons that the AMI Line Code has been chosen for driving copper medium, isolated via transformers,
is that this line code has no dc component, thereby eliminating dc distortion in the line.
6.3.1.2.2
HDB3 Decoding
The Transmit E3 LIU Interface block and the associated LIU embed and combine the data and clocking
information into the line signal that is transmitted to the remote terminal equipment. The remote terminal
equipment has the task of recovering this data and timing information from the incoming E3 data stream. Most
clock and data recovery schemes rely on the use of Phase-Locked-Loop technology. One of the problems of
using Phase-Locked-Loop (PLL) technology for clock recovery is that it relies on transitions in the line signal, in
order to maintain lock with the incoming E3 data-stream. Therefore, these clock recovery scheme, are
vulnerable to the occurrence of a long stream of consecutive zeros (e.g., no transitions in the line). This
scenario can cause the PLL to lose lock with the incoming E3 data, thereby causing the clock and data
recovery process of the receiver to fail. Therefore, some approach is needed to insure that such a long string
of consecutive zeros can never happen. One such technique is HDB3 (or High Density Bipolar -3) encoding.
In general the HDB3 line code behaves just like AMI with the exception of the case when a long string of
consecutive zeros occurs on the line. Any 4 consecutive zeros will be replaced with either a "000V" or a
"B00V" where "B" refers to a Bipolar pulse (e.g., a pulse with a polarity that is compliant with the AMI coding
rule). And "V" refers to a Bipolar Violation pulse (e.g., a pulse with a polarity that violates the alternating
polarity scheme of AMI.) The decision between inserting an "000V" or a "B00V" is made to insure that an odd
number of Bipolar (B) pulses exist between any two Bipolar Violation (V) pulses. The Receive E3 LIU Interface
block, when operating with the HDB3 Line Code is responsible for decoding the HD-encoded data back into a
unipolar (binary-format). For instance, if the Receive E3 LIU Interface block detects a "000V" or a "B00V"
pattern in the incoming pattern, the Receive E3 LIU Interface block will replace it with four (4) consecutive
zeros. Figure 178 presents a timing diagram that illustrates examples of HDB3 decoding.
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