XRT72L50 Datasheet, PDF (263/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
FIGURE 92. THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA INPUT INTERFACE
BLOCK FOR MODE 3 (SERIAL/LOCAL-TIMED/FRAME-MASTER) OPERATION
3 4 .3 6 8 M H z
Clock Source
E 3 _ C lo c k _ In
E 3_D ata_ O ut
T x _S tart_ of_F ram e
E 3_O verh ead_Ind
T x In C lk
TxSer
TxFrame
T x O H _ In d
N ib In tf
Term inal Equipm ent
E3 Fram er
Mode 3 Operation of the Terminal Equipment
In Figure 92, both the Terminal Equipment and the XRT72L50 are driven by an external 34.368 MHz clock
signal. This clock signal is connected to the E3_Clock_In input of the Terminal Equipment and the TxInClk
input pin of the XRT72L50.
The Terminal Equipment will serially output the payload data on its E3_Data_Out output pin, upon the rising
edge of the signal at the E3_Clock_In input pin. Similarly, the XRT72L50 will latch the data, residing on the
TxSer input pin, on the rising edge of TxInClk.
The XRT72L50 will pulse the TxFrame output pin "High" for one bit-period, coincident while it is processing the
last bit-field within a given outbound E3 frame. The Terminal Equipment is expected to monitor the TxFrame
signal (from the XRT72L50) and to place the first bit, within the very next outbound E3 frame on the TxSer input
pin.
NOTE: In this case, the XRT72L50 dictates exactly when the very next E3 frame will be generated. The Terminal
Equipment is expected to respond appropriately by providing the XRT72L50 with the first bit of the new E3 frame,
upon demand. Hence, in this mode, the XRT72L50 is referred to as the Frame Master and the Terminal Equipment
is referred to as the Frame Slave.
Finally, the XRT72L50 will pulse its TxOH_Ind output pin, one bit-period prior to it processing a given overhead
bit, within the outbound E3 frame. Since the TxOH_Ind output pin (of the XRT72L50) is electrically connected
to the E3_Overhead_Ind whenever the XRT72L50 pulses the TxOH_Ind output pin "High”, it will also be driving
the E3_Overhead_Ind input pin (of the Terminal Equipment) "High". Whenever the Terminal Equipment
detects this pin toggling "High", it should delay transmission of the very next E3 frame payload bit by one clock
cycle.
The behavior of the signal between the XRT72L50 and the Terminal Equipment for E3 Mode 3 Operation is
illustrated in Figure 93.
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