XRT72L50 Datasheet, PDF (175/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
FIGURE 48. BEHAVIOR OF TRANSMIT OVERHEAD DATA INPUT INTERFACE SIGNALS BETWEEN THE XRT72L50 AND
THE TERMINAL EQUIPMENT (FOR METHOD 2)
TxInClk
TxOHFrame
TxOHEnable
TxOHIns
TxOH
TxOHEnable Pulse # 8
X bit = 0
X bit = 0
Terminal Equipment
samples “TxOHFrame” and
“TxOHEnable” being “HIGH”
Terminal Equipment
responds by asserting
TxOHIns and placing desired
data on TxOH.
XRT72L5x samples TxOH
here.
4.2.3 The Transmit DS3 HDLC Controller
The Transmit DS3 HDLC Controller block can be used to transport either Bit-Oriented Signaling (BOS) or
Message-Oriented Signaling (MOS) type messages or both types of messages to the remote terminal
equipment.
4.2.3.1
Bit-Oriented Signaling (or FEAC Message) processing via the Transmit DS3 HDLC
Controller.
The Transmit DS3 HDLC Controller block consists of two major blocks:
• The Transmit FEAC Processor.
• The LAPD Transmitter.
If the Transmit DS3 Framer is operating in the C-bit Parity Framing Format then the FEAC (Far-End Alarm &
Control) bit-field of the DS3 Frame can be used to transmit the FEAC messages (See Figure 30). The FEAC
code word is a 6-bit value which is encapsulated by 10 framing bits, forming a 16-bit FEAC message of the
form:
0 d5 d4 d3 d2 d1 d0 0
1
1
1
1
1
1
1
1
where '[d5, d4, d3, d2, d1, d0]' is the FEAC code word. The rightmost bit (e.g., a 1) of the FEAC Message is
transmitted first. Since each DS3 frame contains only 1 FEAC bit, 16 DS3 Frames are required to transmit the
16 bit FEAC Code Message, once
The XRT72L50 contains two registers that support FEAC Message Transmission.
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