English
Language : 

XRT72L50 Datasheet, PDF (25/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
áç
PIN DESCRIPTION
PIN #
67
PIN NAME
TxLEV
68
TAOS
69
LLOOP
XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. 1.2.1
TYPE
O
O
O
DESCRIPTION
Transmit Line Build-Out Enable/Disable Select Output (to be connected
to the XRT73L00 DS3/E3 Line Interface Unit IC):
This output pin is intended to be connected to the TxLev input pin of the
XRT73L00 DS3/E3 Line Interface Unit IC. The user can control the state of
this output pin by writing a "0" or a "1" to Bit 2 (TxLev) within the Line Interface
Driver Register (Address = 0x80).
For DS3 Application:
If the user commands this signal to toggle "High" then the Transmit Line Build-
Out circuit (within the XRT73L00) will be disabled. In this mode, the
XRT73L00 will output unshaped (e.g., square) pulses onto the line (via the
TTIP and TRING output pins).
Conversely, if the user commands this signal to toggle "Low" then the Trans-
mit Line Build-Out circuit (within the XRT73L00) will be disabled. In this mode,
the XRT73L00 will output shaped (e.g., more rounded) pulses onto the line
(via the TTIP and TRING output pins).
In order to comply with the DSX-3 Isolated Pulse Template Requirement (per
Bellcore GR-499-CORE), the user is advised to command this output pin to
be "High" if the cable length (between the transmit output of the XRT73L00
and the DSX-3 Cross-Connect System) is greater than 225 feet. Conversely,
the user is advised to command this output pin to be "Low" if the cable length
(between the transmit output of the XRT73L00 and the DSX-3Cross Connect
System) is less than 225 feet.
For E3 Applications:
This pin can be used as a General Purpose Output pin. The Transmit Line
Build-Out circuitry (within the XRT73L00) is not active for E3 applications.
NOTE: If the customer is not using the XRT73L00 DS3/E3 Line Interface Unit
IC, then this output pin may be used for other purposes.
Transmit All Ones Signal (TAOS) Command (for the XRT73L00 Line Inter-
face Unit IC):
This output pin is intended to be connected to the TAOS input pin of the
XRT73L00 DS3/E3 Line Interface Unit IC. The user can control the state of
this output pin by writing a '0' or '1' to Bit 4 (TAOS) of the Line Interface Drive
Register (Address = 0x80). If the user commands this signal to toggle "High"
then it will force the XRT73L00 Line Interface Unit IC to transmit an "All Ones"
pattern onto the line. Conversely, if the user commands this output signal to
toggle "Low" then the XRT73L00 DS3/E3 Line Interface Unit IC will proceed
to transmit data based upon the pattern that it receives via the TxPOS and
TxNEG output pins.
NOTE: If the customer is not using the XRT73L00 DS3/E3 Line Interface Unit
IC, then this output pin may be used for other purposes.
Local Loopback Output Pin (to the XRT73L00 DS3/E3 Line Interface Unit
IC):
This output pin is intended to be connected to the LLOOP input pin of the
XRT73L00 LIU IC. The user can command this signal to toggle "High" and, in
turn, force the LIU into the Local Loop-back mode. (For a detailed description
of the XRT73L00 DS3/E3 Line Interface Unit IC's operation during Local
Loopback, please see the XRT73L00 DS3/STS-1/E3 Line Interface Unit IC's
Data Sheet).
NOTE: If the customer is not using the XRT73L00 DS3/E3 Line Interface Unit
IC, then this output pin may be used for other purposes.
12