XRT72L50 Datasheet, PDF (303/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
Each of these functional blocks will be discussed in detail in this document.
5.3.1 The Receive E3 LIU Interface Block
The purpose of the Receive E3 LIU Interface block is two-fold:
1. To receive encoded digital data from the E3 LIU IC.
2. To decode this data, convert it into a binary data stream and to route this data to the Receive E3 Framer
block.
Figure 116 presents a simple illustration of the Receive E3 LIU Interface block.
FIGURE 116. THE RECEIVE E3 LIU INTERFACE BLOCK
To Receive E3
Framer Block
Receive
E3 LIU Interface
Block
RxPOS
RxNEG
RxLineClk
The Receive Section of the XRT72L50 will via the Receive E3 LIU Interface Block receive timing and data
information from the incoming E3 data stream. The E3 Timing information will be received via the RxLineClk
input pin and the E3 data information will be received via the RxPOS and RxNEG input pins. The Receive E3
LIU Interface block is capable of receiving E3 data pulses in unipolar or bipolar format. If the Receive E3
framer is operating in the bipolar format, then it can be configured to decode either AMI or HDB3 line code
data. Each of these input formats and line codes will be discussed in detail, below.
5.3.1.1 Unipolar Decoding
If the Receive E3 LIU Interface block is operating in the Unipolar (single-rail) mode, then it will receive the
Single Rail NRZ E3 data pulses via the RxPOS input pin. The Receive E3 LIU Interface block will also receive
its timing signal via the RxLineClk signal.
NOTE: The RxLineClk signal will function as the timing source for the entire Receive Section of the XRT72L50.
No data pulses will be applied to the RxNEG input pin. The Receive E3 LIU Interface block receives a logic "1"
when a logic "1" level signal is present at the RxPOS pin, during the sampling edge of the RxLineClk signal.
Likewise, a logic "0" is received when a logic "0" level signal is applied to the RxPOS pin. Figure 117 presents
an illustration of the behavior of the RxPOS, RxNEG and RxLineClk input pins when the Receive E3 LIU
Interface block is operating in the Unipolar mode.
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