XRT72L50 Datasheet, PDF (156/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
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The behavior of the signal between the XRT72L50 and the Terminal Equipment for DS3 Mode 3 Operation is
illustrated in Figure 37.
FIGURE 37. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE XRT72L50 AND THE TERMINAL
EQUIPMENT (DS3 MODE 3 OPERATION)
Terminal Equipment Signals
DS3_Clock_In
DS3_Data_Out
Tx_Start_of_Frame
Payload[4702] Payload[4703]
DS3_Overhead_Ind
X-Bit
Payload[1]
XRT72L5x Transmit Payload Data I/F Signals
TxInClk
TxSer
Payload[4702] Payload[4703]
TxFrame
TxOH_Ind
X-Bit
Payload[1]
DS3 Frame Number N
Note: TxFrame pulses high to denote
DS3 Frame Boundary.
Note: TxOH_Ind pulses high to
denote Overhead Data
(e.g., the X-bit).
DS3 Frame Number N + 1
Note: X-Bit will not be processed by the
Transmit Payload Data Input Interface.
How to configure the XRT72L50 to operate in this mode.
1. Set the NibIntf input pin "Low".
2. Set the TimRefSel[1:0] bit-fields within the Framer Operating Mode Register to "10” or “11" as depicted
below.
Framer Operating Mode Register (Address = 0x00)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT2
BIT 1
BIT 0
Local Loop-back DS3/E3 Internal LOS
Enable
R/W
R/W
R/W
0
0
1
RESET
R/W
0
Interrupt
Enable Reset
R/W
1
Frame Format
R/W
0
TimRefSel[1:0]
R/W
R/W
1
X
3. Interface the XRT72L50 to the Terminal Equipment as illustrated in Figure 36.
4.2.1.4 Mode 4 - The Nibble-Parallel/Loop-Timed Mode Behavior of the XRT72L50
The XRT72L50 configured to operate in this mode behaves as follows:
Looped Timing
The Transmit Section of the XRT72L50 uses the RxLineClk signal as its timing reference. When the
XRT72L50 is operating in the Nibble-Mode, it internally divides the RxLineClk signal by a factor of four (4) and
outputs this signal via the TxNibClk output pin.
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