XRT72L50 Datasheet, PDF (367/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
The Terminal Equipment will output the payload data of the Outbound E3 data stream via its E3_Data_Out[3:0]
pins on the rising edge of the 8.592MHz clock signal at the E3_Nib_Clock_In input pin.
The XRT72L50 will latch the Outbound E3 data stream (from the Terminal Equipment) on the rising edge of the
TxNibClk output clock signal. The XRT72L50 will indicate that it is processing the last nibble, within a given E3
frame, by pulsing its TxNibFrame output pin "High" for one TxNibClk clock period. When the Terminal
Equipment detects a pulse at its Tx_Start_of_Frame input pin, it is expected to transmit the first nibble, of the
very next Outbound E3 frame to the XRT72L50 via the E3_Data_Out[3:0] (or TxNib[3:0] pins).
Finally, for the Nibble-Parallel Mode operation, the XRT72L50 will pulse the TxOHInd output pin "High" for a
total of 14 nibble periods (e.g., for the 7 overhead bytes, within each of the E3, ITU-T G.832 frames). At the
beginning of an E3 frame, the XRT72L50 will pulse the TxOHInd output pin "High" for 4 nibble periods. These
four nibbles represent the FA1 and FA2 bytes within each E3 frame. Throughout the remainder of the E3
framing period, the XRT72L50 will pulse the TxOHInd output pin 5 times. The width (or duration) of each of
these pulses will be two nibbles. Clearly, each of these 5 pulses corresponds to the five remaining overhead
bytes, within the E3, ITU-T G.832 framing structure.
The behavior of the signals between the XRT72L50 and the Terminal Equipment for E3 Mode 4 Operation is
illustrated in Figure 152.
FIGURE 152. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE XRT72L50 AND THE TERMINAL
EQUIPMENT (MODE 4 OPERATION)
Terminal Equipment Signals
RxOutClk
E3_Nib_Clock_In
E3_Data_Out[3:0]
Tx_Start_of_Frame
E3_Overhead_Ind
Payload Nibble [1059]
Overhead Nibble [0]
XRT72L5x Transmit Payload Data I/F Signals
RxOutClk
TxNibClk
TxNib[3:0]
TxNibFrame
Nibble [1059]
Overhead Nibble [0]
TxOH_Ind
Note: TxNibFrame pulses high to denote
E3 Frame Boundary.
E3 Frame Number N
E3 Frame Number N + 1
TxOH_Ind pulses high for 4 Nibble periods
How to configure the XRT72L50 into Mode 4
1. Set the NibIntf input pin "High".
2. Set the TimRefSel[1:0] bit-fields (within the Framer Operating Mode Register) to "00" as illustrated below.
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