XRT72L50 Datasheet, PDF (229/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
Figure 77 presents the typical behavior of the Receive Overhead Data Output Interface block, when Method 1
is being used to sample the incoming DS3 overhead bits.
FIGURE 77. ILLUSTRATION OF THE SIGNALS THAT ARE OUTPUT VIA THE RECEIVE OVERHEAD OUTPUT INTERFACE
(FOR METHOD 1).
RxOHClk
RxOHFrame
RxOH
X
F1
AIC
F0
FEAC
Terminal Equipment should sample
the “RxOHFrame” and “RxOH” signals
here.
Recommended Sampling Edges
Method 2 - Using RxOutClk and the RxOHEnable signals
Method 1 requires that the Terminal Equipment be able to handle an additional clock signal, RxOHClk.
However, there may be a situation in which the Terminal Equipment circuitry does not have the means to
accommodate and process this extra clock signal, in order to use the Receive Overhead Data Output Interface.
Hence, Method 2 is available. Method 2 involves the use of the following signals.
• RxOH
• RxOutClk
• RxOHEnable
• RxOHFrame
Each of these signals are listed and described below in Table 40.
TABLE 40: LISTING AND DESCRIPTION OF THE PIN ASSOCIATED WITH THE RECEIVE OVERHEAD DATA OUTPUT
INTERFACE BLOCK (METHOD 2)
SIGNAL NAME TYPE
DESCRIPTION
RxOH
Output
Receive Overhead Data Output pin:
The XRT72L50 will output the overhead bits, within the incoming DS3 frames, via this pin.
The Receive Overhead Output Interface will pulse the RxOHEnable output pin (for one RxOut-
Clk period) at approximately the middle of the RxOH bit period. The user is advised to design
the Terminal Equipment to latch the contents of the RxOH output pin, whenever the RxOHEn-
able output pin is sampled "High" on the falling edge of RxOutClk.
RxOHEnable
Output Receive Overhead Data Output Enable - Output pin:
The XRT72L50 will assert this output signal for one RxOutClk period when it is safe for the
Terminal Equipment to sample the data on the RxOH output pin.
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