XRT72L50 Datasheet, PDF (240/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
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The Change of State on Receive LOS Interrupt can be enabled or disabled by writing the appropriate value into
Bit 6 (LOS Interrupt Enable) within the RxDS3 Interrupt Enable Register, as illustrated below.
RxDS3 Interrupt Enable Register (Address = 0x12)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
CP Bit Error
Interrupt
Enable
LOS
Interrupt
Enable
AIS
Interrupt
Enable
Idle Interrupt
Enable
FERF
Interrupt
Enable
AIC
Interrupt
Enable
OOF
Interrupt
Enable
P-Bit Error
Interrupt
Enable
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
Setting this bit-field to “1” enables this interrupt. Conversely, setting this bit-field to “0” disables this interrupt.
Servicing the Change of State on Receive LOS Interrupt
Whenever the XRT72L50 Framer IC detects this interrupt, it will do all of the following.
• It will assert the Interrupt Request output pin (Int) by driving this pin "Low".
• It will set Bit 6 (LOS Interrupt Status) within the RxDS3 Interrupt Status register to “1”, as illustrated below.
RxDS3 Interrupt Status Register (Address = 0x13)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
CP-Bit Error
Interrupt
Status
LOS
Interrupt
Status
AIS
Interrupt
Status
Idle Interrupt
Status
FERF
Interrupt
Status
AIC
Interrupt
Status
OOF
Interrupt
Status
P-Bit Error
Interrupt
Status
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
1
0
0
0
0
0
0
Whenever the user’s system encounters the Change of LOS on Receive Interrupt, then it should do the
following.
1. It should determine the current state of the LOS condition. Recall, that this interrupt can generated, when-
ever the XRT72L50 Framer declares or clears the LOS defects. Hence, the current state of the LOS defect
can be determined by reading the state of Bit 6 (RxLOS), within the RxDS3 Configuration & Status Regis-
ters, as illustrated below.
RxDS3 Configuration & Status Register (Address = 0x10)
BIT 7
RxAIS
RO
0
BIT 6
RxLOS
RO
1
BIT 5
RxIdle
RO
0
BIT 4
RxOOF
RO
0
BIT 3
Reserved
RO
X
BIT 2
Framing On
Parity
R/W
0
BIT 1
FSync
Algo
R/W
0
BIT 0
MSync
Algo
R/W
0
If the LOS State is TRUE
1. It should transmit a FERF (Far-End Receive Failure) to the Remote Terminal Equipment. The XRT72L50
Framer IC automatically supports this action via the FERF-upon-LOS feature.
2. It should transmit the appropriate FEAC Message (per Bellcore GR-499-CORE), to the Remote Terminal,
indicating that a Loss of Signal condition has been declared.
If the LOS State is FALSE
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