XRT72L50 Datasheet, PDF (264/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
áç
FIGURE 93. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE XRT72L50 AND THE TERMINAL
EQUIPMENT (E3 MODE 3 OPERATION)
Terminal Equipment Signals
E3_Clock_In
E3_Data_Out
Tx_Start_of_Frame
E3_Overhead_Ind
Payload[1522] Payload[1523]
FAS , Bit 9
FAS, Bit 8
XRT72L5x Transmit Payload Data I/F Signals
TxInClk
TxSer
Payload[1522] Payload[1523]
TxFrame
TxOH_Ind
FAS, Bit 9
FAS, Bit 8
E3 Frame Number N
Note: TxFrame pulses high to denote
E3 Frame Boundary.
Note: TxOH_Ind pulses high for 12
bit-periods in order to denote
Overhead Data (e.g., the FAS pattern,
the A and N bits).
E3 Frame Number N + 1
Note: FAS pattern will not be processed by the
Transmit Payload Data Input Interface.
How to configure the XRT72L50 to operate in this mode.
1. Set the NibIntf input pin "Low".
2. Set the TimRefSel[1:0] bit-fields (within the Framer Operating Mode Register) to "01" as depicted below.
Framer Operating Mode Register (Address = 0x00)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT2
BIT 1
BIT 0
Local
Loop-back
DS3/E3
R/W
R/W
0
0
Internal
LOS
Enable
R/W
1
RESET
R/W
0
Interrupt
Enable
Reset
R/W
1
Frame
Format
R/W
0
TimRefSel[1:0]
R/W
R/W
0
1
3. Interface the XRT72L50, to the Terminal Equipment, as illustrated in Figure 92.
5.2.1.4 Mode 4 - The Nibble-Parallel/Loop-Timed Mode Behavior of the XRT72L50
If the XRT72L50 has been configured to operate in this mode, then the XRT72L50 will behave as follows.
A. Looped Timing (Uses the RxLineClk as the Timing Reference)
In this mode, the Transmit Section of the XRT72L50 will use the RxLineClk signal as its timing reference.
When the XRT72L50 is operating in the Nibble-Mode, it will internally divide the RxLineClk signal, by a factor of
four (4) and will output this signal via the TxNibClk output pin.
251