XRT72L50 Datasheet, PDF (151/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
The XRT72L50 latches the outbound DS3 data stream from the Terminal Equipment on the rising edge of the
RxOutClk signal.
The XRT72L50 indicates that it is processing the last bit within a given outbound DS3 frame by pulsing its
TxFrame output pin "High" for one bit-period. When the Terminal Equipment detects this pulse at its
Tx_Start_of_Frame input, it is expected to begin transmission of the very next outbound DS3 frame to the
XRT72L50 via the DS3_Data_Out (or TxSer pin).
Finally, the XRT72L50 indicates that it is about to process an overhead bit by pulsing the TxOH_Ind output pin
"High" one bit period prior to its processing. In Figure 32, the TxOH_Ind output pin is connected to the
DS3_Overhead_Ind input pin of the Terminal Equipment. Whenever the DS3_Overhead_Ind pin is pulsed
"High", the Terminal Equipment is expected to not transmit a DS3 payload bit upon the very next clock edge.
Instead, the Terminal Equipment is expected to delay its transmission of the very next payload bit by one clock
cycle.
The behavior of the signals between the XRT72L50 and the Terminal Equipment for DS3 Mode 1 operation is
illustrated in Figure 33.
.
FIGURE 33. BEHAVIOR OF THE TERMINAL INTERFACE SIGNALS BETWEEN THE TRANSMIT PAYLOAD DATA INPUT
INTERFACE BLOCK OF THE XRT72L50 AND THE TERMINAL EQUIPMENT (MODE 1 OPERATION)
Terminal Equipment Signals
DS3_Clock_In
DS3_Data_Out
Payload[4702] Payload[4703]
Tx_Start_of_Frame
DS3_Overhead_Ind
X-Bit
Payload[0]
XRT72L5x Transmit Payload Data I/F Signals
RxOutClk
TxSer
Payload[4702] Payload[4703]
TxFrame
TxOH_Ind
X-Bit
Payload[0]
DS3 Frame Number N
Note: TxFrame pulses high to denote
DS3 Frame Boundary.
Note: TxOH_Ind pulses high to
denote Overhead Data
(e.g., the X-bit).
DS3 Frame Number N + 1
Note: X-Bit will not be processed by the
Transmit Payload Data Input Interface.
How to configure the XRT72L50 into the Serial/Loop-Timed/Non-Overhead Interface Mode
1. Set the NibIntf input pin "Low".
2. Set the TimRefSel[1:0] bit fields within the Framer Operating Mode Register to "00", as illustrated below.
Framer Operating Mode Register (Address = 0x00)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT2
BIT 1
BIT 0
Local Loop-back DS3/E3
R/W
R/W
0
0
Internal
LOS Enable
R/W
1
RESET
R/W
0
Interrupt
Enable Reset
R/W
1
Frame Format
R/W
0
TimRefSel[1:0]
R/W
R/W
0
0
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