XRT72L50 Datasheet, PDF (100/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
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Writing a “0" disables the LAPD Transmitter (default condition). Writing a "1" enables the LAPD Transmitter.
NOTE: For information on the LAPD Transmitter, refer to Section 4.2.3.2.
2.3.5.5 Transmit DS3 LAPD Status and Interrupt Register
TxDS3 LAPD Status and Interrupt Register (Address = 0x34)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Not Used
TxDL Start TxDL Busy
TxLAPD
Interrupt
Enable
TxLAPD
Interrupt
Status
RO
RO
RO
RO
R/W
RO
R/W
RUR
0
0
0
0
0
0
0
0
Bit 3 - TxDL Start
This Read/Write bit-field allows the user to invoke the Transmit LAPD Message command. Once the user
invokes this command, the LAPD Transmitter will do the following:
• Read in the PMDL Header and Message from the Transmit LAPD Message Buffer. (80 or 86 bytes)
• Compute the frame check sequence word (16 bit value)
• Insert the Frame Check Sequence value into the 2 octet slot after the payload section of the Message.
• Perform zero stuffing between 0x7E flag bytes. (81 or 87 bytes)
• Proceed to transmit the LAPD Message Frame to the far end terminal via the outgoing DS3 frames.
Writing a "1" to this bit-field start the transmission of the LAPD Message Frame, via the LAPD Transmitter.
NOTE: For more information on the LAPD Transmitter, refer to Section 4.2.3.2.
Bit 2 - TxDL Busy
This Read-Only bit-field allows the local µP to poll and determine if the LAPD Transmitter has completed its
transmission of the LAPD Message frame. This bit-field will contain a "1", if the LAPD Transmitter is still
transmitting the LAPD Message frame to the far-end terminal. This bit-field will toggle to "0", once the LAPD
Transmitter has completed its transmission of the LAPD Message frame.
NOTE: For more information on the LAPD Transmitter, refer to Section 4.2.3.2.
Bit 1 - TxLAPD Interrupt Enable
This Read/Write bit-field allows the user to enable or disable the LAPD Message Frame Transmission
Complete interrupt.
Writing a "0" to this bit-field disables this interrupt. Writing a "1" to this bit-field enables this interrupt.
Bit 0 - TxLAPD Interrupt Status
This Reset-upon-Read bit-field indicates whether or not the LAPD Message frame Transmission Complete
interrupt has occurred since the last read of this register. The purpose of this interrupt is to let the local µP
know that the LAPD Transmitter has completed its transmission of the LAPD Message frame (containing the
latest PMDL message) and is now ready to transmit another LAPD Message frame.
A "0" in this bit-field indicates that the LAPD Message frame Transmission Complete interrupt has not occurred
since the read of this register. A "1" in this bit-field indicates that this interrupt has occurred since the last read
of this register.
NOTE: For more information on the TxLAPD Interrupt, refer to Section 4.2.3.2.
87