XRT72L50 Datasheet, PDF (167/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
FIGURE 45. THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT OVERHEAD DATA INPUT INTERFACE
(METHOD 1)
DS3_OH_Clock_In
DS3_OH_Out
Tx_Start_of_Frame
Insert_OH
44.736MHz
Clock Source
TxInClk
TxOHClk
TxOH
RxLineClk
TxOHFrame
44.736MHz
Clock Source
TxOHIns
Terminal Equipment
DS3 Framer
Method 1 Operation of the Terminal Equipment
If the Terminal Equipment intends to insert any overhead data into the outbound DS3 data stream via the
Transmit Overhead Data Input Interface, then it is expected to do the following.
1. To sample the state of the TxOHFrame signal (e.g., the Tx_Start_of_Frame input signal) on the rising edge
of the TxOHClk (e.g., the DS3_OH_Clock_In signal).
2. To keep track of the number of rising clock edges that have occurred via the TxOHClk (e.g., the
DS3_OH_Clock_In signal) since the last time the TxOHFrame signal was sampled "High". By doing this
the Terminal Equipment will be able to keep track of which overhead bit is being processed by the Transmit
Overhead Data Input Interface block at any given time. When the Terminal Equipment knows which over-
head bit is being processed at a given TxOHClk period, it knows when to insert a desired overhead bit
value into the outbound DS3 data stream. From this, the Terminal Equipment knows when it should assert
the TxOHIns input pin and place the appropriate value on the TxOH input pin of the XRT72L50.
Table 18 relates the number of rising clock edges in the TxOHClk signal since the TxOHFrame was sampled
"High" to the DS3 Overhead Bit that is being processed.
TABLE 18: THE RELATIONSHIP BETWEEN THE NUMBER OF RISING CLOCK EDGES IN TXOHCLK SINCE TXOHFRAME
WAS LAST SAMPLED "HIGH" TO THE DS3 OVERHEAD BIT THAT IS BEING PROCESSED
NUMBER OF RISING CLOCK EDGES IN
TXOHCLK
0 (Clock edge is coincident with TxO-
HFrame being detected "High")
1
2
3
4
5
THE OVERHEAD BIT EXPECTED BY THE
XRT72L50
X
F1
AIC
F0
NA
F0
CAN THIS OVERHEAD BIT BE ACCEPTED
BY THE XRT72L50?
Yes
No
Yes
No
Yes
No
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