XRT72L50 Datasheet, PDF (315/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
5.3.2.6 E3 Receive Alarms
5.3.2.7 The Loss of Signal (LOS) Alarm
Declaring an LOS Condition
The Receive E3 Framer block will declare a Loss of Signal (LOS) Condition, when it detects 32 consecutive
incoming “0’s” via the RxPOS and RxNEG input pins or if the ExtLOS input pin (from the XRT73L00 DS3/E3/
STS-1 LIU IC) is asserted.
The Framer chip allows the user to modify the LOS Declaration criteria such that an LOS condition is declared
only if the RLOS input pin (from the XRT73L00 DS3/E3/STS-1 LIU IC) is asserted. In this case, the internally-
generated LOS criteria of 180 consecutive “zeros” will be disabled. This can be accomplished by writing a "0"
to bit 5 (Internal LOS Enable) of the Framer Operating Mode Register, as depicted below.
Framer Operating Mode Register (Address = 0x00)
BIT 7
BIT 6
BIT 5
Local Loop-back DS3/E3 Internal LOS
Enable
R/W
R/W
R/W
X
0
0
BIT 4
RESET
R/W
X
BIT 3
Interrupt
Enable Reset
R/W
X
BIT2
Frame Format
R/W
X
BIT 1
BIT 0
TimRefSel[1:0]
R/W
R/W
X
X
NOTE: For more information on the RLOS input pin, please see Section 2.1.
The Receive E3 Framer block will indicate that it is declaring an LOS condition by.
• Asserting the RxLOS output pin (e.g., toggling it "High”).
• Setting Bit 4 (RxLOS) of the Rx E3 Configuration & Status Register to “1” as depicted below.
RxE3 Configuration & Status Register - 2 (Address = 0x11)
BIT 7
RxLOF
Algo
R/W
0
BIT 6
RxLOF
RO
1
BIT 5
RxOOF
RO
1
BIT 4
RxLOS
RO
1
BIT 3
RxAIS
RO
0
BIT 2
BIT 1
Not Used
RO
RO
0
0
BIT 0
RxFERF
RO
0
• The Receive E3 Framer block will generate a Change in LOS Condition interrupt request. Upon generating
this interrupt request, the Receive E3 Framer block will assert Bit 1 (LOS Interrupt Status within the Rx E3
Framer Interrupt Status Register - 1, as depicted below.
RxE3 Interrupt Status Register - 1 (Address = 0x14)
BIT 7
BIT 6
Not Used
BIT 5
RO
RO
RO
0
0
0
BIT 4
COFA
Interrupt
Status
RUR
0
BIT 3
OOF
Interrupt
Status
RUR
0
BIT 2
LOF
Interrupt
Status
RUR
0
BIT 1
LOS
Interrupt
Status
RUR
1
BIT 0
AIS
Interrupt
Status
RUR
0
Clearing the LOS Condition
The Receive E3 Framer block will clear the LOS condition when it encounters a stream of 32 bits that does not
contain a string of 4 consecutive zeros or if ExtLOS pin goes “Low”.
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