XRT72L50 Datasheet, PDF (249/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
RxDS3 FEAC Interrupt Enable/Status Register (Address = 0x17)
BIT 7
RO
0
BIT 6
Not Used
RO
0
BIT 5
RO
0
BIT 4
FEAC Valid
RO
0
BIT 3
RxFEAC
Remove
Interrupt
Enable
R/W
0
BIT 2
RxFEAC
Remove
Interrupt
Status
RUR
0
BIT 1
RxFEAC
Valid
Interrupt
Enable
R/W
X
BIT 0
RxFEAC
Valid
Interrupt
Status
RUR
0
Setting this bit-field to “1” enables this interrupt. Conversely, setting this bit-field to “0” disables this interrupt.
Servicing the Receive FEAC Message - Validation Interrupt.
Whenever the XRT72L50 Framer IC generates this interrupt, it will do the following.
• It will assert the Interrupt Request output pin (Int) by driving it "Low".
• It will set Bit 0 (RxFEAC Valid Interrupt Status), within the RxDS3 FEAC Interrupt Enable/Status Register to
“1”, as indicated below.
RxDS3 FEAC Interrupt Enable/Status Register (Address = 0x17)
BIT 7
RO
0
BIT 6
Not Used
RO
0
BIT 5
RO
0
BIT 4
FEAC Valid
RO
0
BIT 3
RxFEAC
Remove
Interrupt
Enable
R/W
0
BIT 2
RxFEAC
Remove
Interrupt
Status
RUR
0
BIT 1
RxFEAC
Valid
Interrupt
Enable
R/W
1
BIT 0
RxFEAC
Valid
Interrupt
Status
RUR
1
• It will write the contents of this validated FEAC Message into the Rx DS3 FEAC Register, as indicated below.
RXDS3 FEAC REGISTER (ADDRESS = 0X16)
BIT 7
Not Used
RO
0
BIT 6
RO
0
BIT 5
RO
0
BIT 4
BIT 3
RxFEAC[5:0]
RO
RO
0
0
BIT 2
RO
0
BIT 1
RO
0
BIT 0
Not Used
RO
0
Whenever the Terminal Equipment encounters the Receive FEAC Message - Validation Interrupt, then it
should do the following.
• It should read the contents of the High RxDS3 FEAC Register, and respond accordingly.
4.3.6.2.10 The Receive FEAC Message - Removal Interrupt
if the Receive FEAC Message - Removal Interrupt is enabled, then the XRT72L50 Framer IC will generate an
interrupt any time the High Receive FEAC Processor removes a new FEAC (Far-End Alarm & Control)
Message.
In particular, the Receive FEAC Processor will remove a FEAC Message if it has received a different FEAC
Message (from the most recently validated message) in 3 of the last 10 FEAC Message receptions.
Enabling/Disabling the Receive FEAC Message - Removal Interrupt
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