XRT72L50 Datasheet, PDF (347/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
Enabling and Disabling the Change of Framing Alignment Interrupt
The user can enable or disable the Change of Framing Alignment Interrupt by writing the appropriate value into
Bit 4 (COFA Interrupt Enable), within the Rx E3 Interrupt Enable Register - 1.
RxE3 Interrupt ENABLE Register - 1 (Address = 0x12)
BIT 7
BIT 6
Not Used
BIT 5
RO
RO
RO
0
0
0
BIT 4
COFA
Interrupt
Enable
R/W
X
BIT 3
OOF
Interrupt
Enable
R/W
0
BIT 2
LOF
Interrupt
Enable
R/W
0
BIT 1
LOS
Interrupt
Enable
R/W
0
BIT 0
AIS
Interrupt
Enable
R/W
0
Writing a “1” into this bit-field enables the Change of Framing Alignment Interrupt. Conversely, writing a “0” into
this bit-field disables the Change of Framing Alignment Interrupt.
Servicing the Change of Framing Alignment Interrupt
Whenever the XRT72L50 Framer IC generates this interrupt, it will do the following.
• It will assert the Interrupt Request output pin (Int) by driving it "Low".
• It will set Bit 4 (COFA Interrupt Status), within the Rx E3 Interrupt Status Register -1, to “1”, as indicated
below.
RxE3 Interrupt Status Register - 1 (Address = 0x14)
BIT 7
BIT 6
Not Used
BIT 5
RO
RO
RO
0
0
0
BIT 4
COFA
Interrupt
Status
RUR
1
BIT 3
OOF
Interrupt
Status
RUR
0
BIT 2
LOF
Interrupt
Status
RUR
0
BIT 1
LOS
Interrupt
Status
RUR
0
BIT 0
AIS
Interrupt
Status
RUR
0
5.3.6.2.6
The Change in Receive FERF Condition Interrupt
If the Change in Receive FERF Condition Interrupt is enabled, then the XRT72L50 Framer IC will generate an
interrupt in response to either of the following conditions.
1. When the XRT72L50 Framer IC declares a FERF (Far-End Receive Failure) Condition, and
2. When the XRT72L50 Framer IC clears the FERF condition.
Conditions causing the XRT72L50 Framer IC to declare an FERF Condition.
• If the XRT72L50 Framer IC begins receiving E3 frames which have the A bit set to “1”).
Conditions causing the XRT72L50 Framer IC to clear the AIS Condition.
• If the XRT72L50 Framer IC begins receiving E3 frames that do NOT have the A bit set to “1”.
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