XRT72L50 Datasheet, PDF (58/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
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TABLE 4: REGISTER ADDRESSING OF THE FRAMER PROGRAMMER REGISTERS
ADDRESS
REGISTER NAME
POWER UP
DEFAULT VALUE
HEX
DEFAULT VALUE
REGISTER TYPE
0x40
TxE3 TTB-8 Register - G.832
b00000000
0x00
R/W
0x41
0x42
TxE3 TTB-9 Register - G.832
TxE3 TTB-10 Register - G.832
b00000000
0x00
R/W
b00000000
0x00
R/W
0x43
TxE3 TTB-11 Register - G.832
b00000000
0x00
R/W
0x44
TxE3 TTB-12 Register - G.832
b00000000
0x00
R/W
0x45
0x46
TxE3 TTB-13 Register - G.832
TxE3 TTB-14 Register - G.832
b00000000
0x00
R/W
b00000000
0x00
R/W
0x47
TxE3 TTB-15 Register - G.832
b00000000
0x00
R/W
0x48
TxE3 FA1 Error Mask Register - G.832
b00000000
0x00
R/W
TxE3 FAS Error Mask Upper Register-0 - G.751
0x49
TxE3 FA2 Error Mask Register - G.832
b00000000
0x00
R/W
TxE3 FAS Error Mask Lower Register-1 - G.751
0x4A
0x4B
TxE3 BIP-8 Mask Register - G.832
TxE3 BIP-4 Mask Register - G.751
TxSSM Register - G.832
b00000000
0x00
R/W
b00000000
0x00
R/W
0x4C-0x4F Reserved
0x50
PMON LCV Event Count Register - MSB
b00000000
0x00
RUR
0x51
0x52
PMON LCV Event Count Register - LSB
PMON Framing Bit Error Event Count Register -
MSB
b00000000
b00000000
0x00
0x00
RUR
RUR
0x53
PMON Framing Bit Error Event Count Register -
LSB
b00000000
0x00
RUR
0x54
PMON Parity Error Event Count Register - MSB
b00000000
0x00
RUR
0x55
PMON Parity Error Event Count Register - LSB
b00000000
0x00
RUR
0x56
0x57
PMON FEBE Event Count Register - MSB
PMON FEBE Event Count Register - LSB
b00000000
b00000000
0x00
0x00
RUR
RUR
0x58
PMON CP Bit Error Event Count Register - MSB b00000000
0x00
RUR
0x59
PMON CP Bit Error Event Count Register - LSB
b00000000
0x00
RUR
0x5A - 0x67 Reserved
0x68
PRBS Bit Error Counter - MSB
b00000000
0x00
RUR
0x69
PRBS Bit Error Counter - LSB
b00000000
0x00
RUR
0x6A-0x6B Reserved
0x6C PMON Holding Register
b00000000
0x00
RUR
0x6D One-Second Error Status Register
b00000000
0x00
RO
45