XRT72L50 Datasheet, PDF (346/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
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• It will set Bit 0 (AIS Interrupt Status), within the Rx E3 Interrupt Status Register - 1 to “1”, as indicated below.
RxE3 Interrupt Status Register - 1 (Address = 0x14)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Not Used
COFA
Interrupt
Status
OOF
Interrupt
Status
LOF
Interrupt
Status
LOS
Interrupt
Status
AIS
Interrupt
Status
RO
RO
RO
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
1
Whenever the user’s system encounters the Change in Receive AIS Condition Interrupt, then it should do the
following.
1. It should determine the current state of the AIS condition. Recall, that this interrupt can be generated,
whenever the XRT72L50 Framer IC declares or clears the AIS defect. Hence, the user can determine the
current state of the AIS defect by reading the state of Bit 3 (RxAIS) within the Rx E3 Configuration and Sta-
tus Register - 2, as illustrated below.
RxE3 Configuration & Status Register - 2 (Address = 0x11)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
RxLOF
Algo
RxLOF
RxOOF
RxLOS
RxAIS
Not Used
RxFERF
R/W
RO
RO
RO
RO
RO
RO
RO
0
1
1
0
0
1
1
1
If the AIS Condition is TRUE
1. It should begin transmitting the FERF indication to the Remote Terminal Equipment. Please see
Section 5.2.4.2.1.3.
If the AIS Condition is FALSE
2. It should cease transmitting the FERF indication to the Remote Terminal Equipment.
NOTE: The device cannot be configured to automatically send/clear FERF on LOS, LOOf, OOF or AIS in E3 G.751 mode.
The user must implemt it in the ISR.
Please see Section 5.2.4.2.1.3 for instructions on how to control the state of the A bit-field, within each
outbound E3 frame.
5.3.6.2.5
The Change of Framing Alignment Interrupt
If the Change of Framing Alignment Interrupt is enabled then the XRT72L50 Framer IC will generate an
interrupt any time the Receive E3 Framer block detects an abrupt change of framing alignment.
NOTE: This interrupt is typically accompanied with the Change in Receive OOF Condition interrupt as well.
Conditions causing the XRT72L50 Framer IC to generate this interrupt.
If the XRT72L50 Framer detects receives at least four consecutive E3 frames, within its Framing Alignment
bytes in Error, then the XRT72L50 Framer IC will declare an OOF condition. However, while the XRT72L50
Framer IC is operating in the OOF condition, it will still rely on the old framing alignment for E3 payload data
extraction, etc.
However, if the Receive E3 Framer had to change alignment, in order to re-acquire frame synchronization, then
this interrupt will occur.
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