XRT72L50 Datasheet, PDF (390/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
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TxE3 LAPD Status and Interrupt Register (Address = 0x34)
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BIT 7
RO
0
BIT 6
BIT 5
Not Used
RO
RO
0
0
BIT 4
RO
0
BIT 3
TxDL Start
BIT 2
TxDL Busy
R/W
RO
1
0
BIT 1
TxLAPD
Interrupt
Enable
R/W
0
BIT 0
TxLAPD
Interrupt
Status
RUR
0
A “0” to “1” transition in Bit 3 (TxDL Start) in this register, initiates the transmission of LAPD Message frames.
At this point, the LAPD Transmitter will begin to search thorugh the PMDL message, which is residing within
the Transmit LAPD Message buffer. It will first compute and append a 2 byte FCS value and if the LAPD
Transmitter finds any string of five (5) consecutive “1’s” in the PMDL Message, then the LAPD Transmitter will
insert a “0” immediately following these strings of consecutive “1’s”. This procedure is known as stuffing. The
purpose of PMDL Message stuffing is to insure that the user’s PMDL Message does not contain strings of data
that mimic the Flag Sequence octet (e.g., six consecutive “1’s”) or the ABORT Sequence octet (e.g., seven
consecutive “1’s”). Afterwards, the LAPD Transmitter will begin to encapsulate the PMDL Message, residing in
the Transmit LAPD Message buffer, into a LAPD Message frame. Finally, the LAPD Transmitter will fragment
the Outbound LAPD Message frame into octets and will begin to transport these octets via the GC or the NR
byte-fields (depending upon the user’s selection) of each Outbound E3 frame.
While the LAPD Transmitter is transmitting this LAPD Message frame, the TxDL Busy bit-field (Bit 2) within the
Tx E3 LAPD Status and Interrupt Register, will be set to “1”. This bit-field allows the user to poll the status of
the LAPD Transmitter. Once the LAPD Transmitter has completed the transmission of the LAPD Message,
then this bit-field will toggle back to “0”.
The user can configure the LAPD Transmitter to interrupt the local Microprocessor/Microcontroller upon
completion of transmission of the LAPD Message frame, by setting bit-field 1 (TxLAPD Interrupt Enable) within
the Tx E3 LAPD Status and Interrupt register (Address = 0x34). to “1” as depicted below.
TxE3 LAPD Status and Interrupt Register (Address = 0x34)
BIT 7
RO
0
BIT 6
BIT 5
Not Used
RO
RO
0
0
BIT 4
RO
0
BIT 3
TxDL Start
BIT 2
TxDL Busy
R/W
RO
0
0
BIT 1
TxLAPD
Interrupt
Enable
R/W
1
BIT 0
TxLAPD
Interrupt
Status
RUR
0
‘The purpose of this interrupt is to let the Microprocessor/Microcontroller know that the LAPD Transmitter is
available and ready to transmit a LAPD Message frame (which contains a new PMDL Message) to the remote
terminal equipment. Bit 0 (Tx LAPD Interrupt Status) within the Tx E3 LAPD Status and Interrupt Register will
reflect the status for the Transmit LAPD Interrupt.
NOTE: This bit-field will be reset upon reading this register.
Summary of Operating the LAPD Transmitter
Once the user has invoked the TxDL Start command, the LAPD Transmitter will do the following.
• Depending on the message type, compute the 16 bit Frame Check Sum (FCS) of the LAPD Message Frame
(e.g., of the LAPD Message header and information payload) and append this value to the LAPD Message,
(at the end of 76 or 82 bytes).
• Append a trailer Flag Sequence octet to the end of the message LAPD following the 16 bit FCS value.
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