XRT72L50 Datasheet, PDF (323/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
2. Enable the BIP-4 Error Interrupt. This is accomplished by writing a “1” into bit-field 2 (BIP-4 Error Interrupt
Enable) within the RxE3 Interrupt Enable Register, as illustrated below.
RxE3 Interrupt Enable Register - 2 (Address = 0x13)
BIT 7
R/W
0
BIT 6
BIT 5
Not Used
RO
RO
0
0
BIT 4
RO
0
BIT 3
BIT 2
BIT 1
FERF
BIP-4 Error Framing Error
Interrupt Enable Interrupt Enable Interrupt Enable
R/W
R/W
R/W
0
1
0
BIT 0
Not Used
RO
0
After doing this, the XRT72L50 Framer IC will generate an interrupt to the Microprocessor/Microcontroller
anytime the Receive Section detects a BIP-4 error.
5.3.3 The Receive HDLC Controller Block
The Receive E3 HDLC Controller block can be used to receive message-oriented signaling (MOS) type data
link messages from the remote terminal equipment.
The MOS types of HDLC message processing is discussed in detail below.
The Message Oriented Signaling (e.g., LAP-D) Processing via the Receive E3 HDLC Controller block
The LAPD Receiver (within the Receive E3 HDLC Controller block) allows the user to receive PMDL messages
from the remote terminal equipment, via the inbound E3 frames. In this case, the inbound message bits will be
carried by the N bit-field within each inbound E3 Frame. The remote LAPD Transmitter will transmit a LAPD
Message to the Local Receiver via either the N bit within each E3 Frame. The LAPD Receiver will receive and
store the information portion of the received LAPD frame into the Receive LAPD Message Buffer, which is
located at addresses: 0xDE through 0x135 within the on-chip RAM. The LAPD Receiver has the following
responsibilities.
• Framing to the incoming LAPD Messages
• Filtering out stuffed “Zeros” (Between the two flag sequence bytes, 0x7E)
• Storing the Frame Message into the Receive LAPD Message Buffer
• Perform Frame Check Sequence (FCS) Verification
• Provide status indicators for
End of Message (EOM)
Flag Sequence Byte detected
Abort Sequence detected
Message Type
C/R Type
The occurrence of FCS Errors
The LAPD receiver's actions are facilitated via the following two registers.
• Rx E3 LAPD Control Register
• Rx E3 LAPD Status Register
Operation of the LAPD Receiver
The LAPD Receiver, once enabled, will begin searching for the boundaries of the incoming LAPD message.
The LAPD Message Frame boundaries are delineated via the Flag Sequence octets (0x7E), as depicted in
Figure 130.
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