XRT72L50 Datasheet, PDF (335/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
Figure 136 presents the typical behavior of the Receive Overhead Data Output Interface block, when Method 2
is being used to sample the incoming E3 overhead bits.
FIGURE 136. ILLUSTRATION OF THE SIGNALS THAT ARE OUTPUT VIA THE RECEIVE OVERHEAD DATA OUTPUT INTER-
FACE BLOCK (FOR METHOD 2).
RxOutClk
RxOHEnable
RxOHFrame
Recommended
Sampling
Edges
RxOH
BIP - 4, Bit 0
FAS, Bit 9
FAS, Bit 8
FAS, Bit 7
FAS, Bit 6
5.3.5 The Receive Payload Data Output Interface
Figure 137 presents a simple illustration of the Receive Payload Data Output Interface block.
FIGURE 137. THE RECEIVE PAYLOAD DATA OUTPUT INTERFACE BLOCK
RxOHInd
RxSer
RxNib[3:0]
RxClk
RxOutClk
RxFrame
Receive
Payload Data
Output Interface
From Receive
E3 Framer Block
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