XRT72L50 Datasheet, PDF (345/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
Setting this bit-field to “1” enables this interrupt. Conversely, setting this bit-field to “0” disables this interrupt.
Servicing the Change in Receive LOF Condition Interrupt
Whenever the XRT72L50 Framer IC detects this interrupt, it will do all of the following.
• It will assert the Interrupt Request output pin (Int), by driving it "Low".
• It will set Bit 6 (LOF Interrupt Status), within the Rx E3 Interrupt Status Register - 1 to “1”, as indicated below.
RxE3 Configuration & Status Register - 2 (Address = 0x11)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
RxLOF
Algo
RxLOF
RxOOF
RxLOS
RxAIS
Not Used
RxFERF
R/W
RO
RO
RO
RO
RO
RO
RO
0
1
1
0
0
1
1
1
5.3.6.2.4
The Change in Receive AIS Condition Interrupt
If the Change in Receive AIS Condition Interrupt is enabled, then the XRT72L50 Framer IC will generate an
interrupt in response to either of the following conditions.
1. When the XRT72L50 Framer IC declares an AIS (Loss of Signal) Condition, and
2. When the XRT72L50 Framer IC clears the AIS condition.
Conditions causing the XRT72L50 Framer IC to declare an AIS Condition.
• If the XRT72L50 Framer IC detects 7 or less “0” within 2 consecutive E3 frames.
Conditions causing the XRT72L50 Framer IC to clear the AIS Condition.
• If the XRT72L50 Framer IC detects 2 consecutive E3 frames that each contain 8 or more “0’s”.
Enabling and Disabling the Change in Receive AIS Condition Interrupt
The user can enable or disable the Change in Receive LOS Condition Interrupt, by writing the appropriate
value into Bit 0 (AIS Interrupt Enable), within the RxE3 Interrupt Enable Register - 1, as indicated below.
RxE3 Interrupt Enable Register - 1 (Address = 0x12)
BIT 7
BIT 6
Not Used
BIT 5
RO
RO
RO
0
0
0
BIT 4
COFA
Interrupt
Enable
R/W
0
BIT 3
OOF
Interrupt
Enable
R/W
0
BIT 2
LOF
Interrupt
Enable
R/W
0
BIT 1
LOS
Interrupt
Enable
R/W
X
BIT 0
AIS
Interrupt
Enable
R/W
X
Setting this bit-field to “1” enables this interrupt. Conversely, setting this bit-field to “0” disables this interrupt.
Servicing the Change in Receive AIS Condition Interrupt
Whenever the XRT72L50 Framer IC detects this interrupt, it will do all of the following.
• It will assert the Interrupt Request output pin (Int), by driving it "Low".
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