XRT72L50 Datasheet, PDF (417/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
RxE3 Interrupt Status Register - 1 (Address = 0x14)
BIT 7
BIT 6
Not Used
BIT 5
RO
RO
RO
0
0
0
BIT 4
COFA
Interrupt
Status
RUR
0
BIT 3
OOF
Interrupt
Status
RUR
0
BIT 2
LOF
Interrupt
Status
RUR
1
BIT 1
LOS
Interrupt
Status
RUR
0
BIT 0
AIS
Interrupt
Status
RUR
0
Finally, the Receive E3 Framer block will also inform the external circuitry of this transition to the LOF Condition
state by toggling the RxLOF output pin "High".
6.3.2.2 The Framing Maintenance Mode
Once the Receive E3 Framer block enters the In-Frame state, then it will notify the Microprocessor/
Microcontroller of this fact by generating both the Change in OOF Condition and Change in LOF Condition
Interrupts. When this happens, bits 2 and 3 (LOF Interrupt Status and OOF Interrupt Status) will be set to “1”,
as depicted below.
RxE3 Interrupt Status Register - 1 (Address = 0x14)
BIT 7
BIT 6
Not Used
BIT 5
RO
RO
RO
0
0
0
BIT 4
COFA
Interrupt
Status
RUR
0
BIT 3
OOF
Interrupt
Status
RUR
1
BIT 2
LOF
Interrupt
Status
RUR
1
BIT 1
LOS
Interrupt
Status
RUR
0
BIT 0
AIS
Interrupt
Status
RUR
0
Additionally, the Receive E3 Framer block will inform the external circuitry of its transition to the In-Frame state
by toggling both the RxOOF and RxLOF output pins "Low”.
Finally, the Receive E3 Framer block will negate both the RxOOF and the RxLOF bit-fields within the Rx E3
Configuration & Status Register, as depicted below.
RxE3 Configuration & Status Register 2 (Address = 0x11)
BIT 7
Rx LOF Algo
BIT 6
RxLOF
R/W
RO
0
0
BIT 5
RxOOF
RO
0
BIT 4
RxLOS
RO
0
BIT 3
RxAIS
RO
0
BIT 2
RxPld Unstab
RO
0
BIT 1
Rx
TMark
RO
0
BIT 0
RxFERF
RO
0
When the Receive E3 Framer block is operating in the In-Frame state, it will then begin to perform Frame
Maintenance operations, where it will continue to verify that the Frame Alignment octets (FA1, FA2) are
present, at their proper locations. While the Receive E3 Framer block is operating in the Frame Maintenance
Mode, it will declare an Out-of-Frame (OOF) Condition if it detects invalid Framing Alignment bytes in four
consecutive frames.
Since the Receive E3 Framer block requires the detection of invalid Frame Alignment bytes in four consecutive
frames, in order for it to transition to the OOF Condition state, it can tolerate some errors in the Framing
Alignment bytes, and still remain in the In-Frame state. However, each time the Receive E3 Framer block
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