XRT72L50 Datasheet, PDF (169/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
TABLE 18: THE RELATIONSHIP BETWEEN THE NUMBER OF RISING CLOCK EDGES IN TXOHCLK SINCE TXOHFRAME
WAS LAST SAMPLED "HIGH" TO THE DS3 OVERHEAD BIT THAT IS BEING PROCESSED
NUMBER OF RISING CLOCK EDGES IN
TXOHCLK
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
THE OVERHEAD BIT EXPECTED BY THE
XRT72L50
F0
DL
F1
M1
F1
UDL
FO
UDL
FO
UDL
F1
M0
F1
UDL
F0
UDL
F0
UDL
F1
CAN THIS OVERHEAD BIT BE ACCEPTED
BY THE XRT72L50?
No
Yes
No
No
No
Yes
No
Yes
No
Yes
No
No
No
Yes
No
Yes
No
Yes
No
3. After the Terminal Equipment has waited the appropriate number of clock edges from the TxOHFrame sig-
nal being sampled "High", it should assert the TxOHIns input signal. Concurrently, the Terminal Equipment
should also place the appropriate value of the inserted overhead bit onto the TxOH signal.
4. The Terminal Equipment should hold both the TxOHIns input pin "High" and the value of the TxOH signal
stable until the next rising edge of TxOHClk is detected.
Case Study: The Terminal Equipment intends to insert the appropriate overhead bits into the Transmit
Overhead Data Input Interface using Method 1 in order to transmit a Yellow Alarm to the remote
terminal equipment.
For DS3 Applications, a Yellow Alarm is transmitted by setting both of the X bits within each outbound DS3
frame to “0”.
Assuming that the connection between the Terminal Equipment and the XRT72L50 is as illustrated in
Figure 45, then Figure 46 presents an illustration of the signaling that must go on between the Terminal
Equipment and the XRT72L50.
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