XRT72L50 Datasheet, PDF (149/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
TABLE 15: DESCRIPTIONS FOR THE PINS ASSOCIATED WITH THE TRANSMIT PAYLOAD DATA INPUT INTERFACE
SIGNAL NAME
TxOHInd
TxFrame
TxFrameRef
RxOutClk
TYPE
DESCRIPTION
O ^{Transmit Overhead Bit Indicator Output:}
This output pin pulses "High" one-bit period prior to the time that the Transmit Section of the
XRT72L50 is processing an Overhead bit. The purpose of this output pin is to warn the Terminal
Equipment that during the very next bit-period, the XRT72L50 is going to be processing an Over-
head bit and ignoring any data that is applied to the TxSer input pin.
For DS3 applications, this output pin is only active if the XRT72L50 is operating in the Serial Mode.
This output pin is pulled "Low" if the device is operating in the Nibble-Parallel Mode.
O ^{Transmit End of Frame Output Indicator:}
The Transmit Section of the XRT72L50 pulses this output pin "High" for one bit-period when the
Transmit Payload Data Input Interface is processing the last bit of a given DS3 frame.
The purpose of this output pin is to alert the Terminal Equipment that it needs to begin transmission
of a new DS3 frame to the XRT72L50 (e.g., to permit the XRT72L50 to maintain Transmit DS3
framing alignment control over the Terminal Equipment).
I ^{Transmit Frame Reference Input:}
The XRT72L50 permits the configuration of the Transmit Section to use this input pin as a frame
reference. If this configuration is selected, then the Transmit Section initiates its transmission of a
new DS3 frame upon the rising edge of this signal.
The purpose of this input pin is to permit the Terminal Equipment to maintain Transmit DS3 Fram-
ing alignment control over the XRT72L50.
O ^{Loop-Timed Timing Reference Clock Output pin:}
The Transmit Section of the XRT72L50 can be configured to use the RxLineClk signal as the Tim-
ing Reference (e.g., loop-timing). If this configuration is selected, then the XRT72L50 outputs a
44.736 MHz clock signal via this pin to the Terminal Equipment and samples the data on the TxSer
input pin upon the rising edge of this clock signal.
Operation of the Transmit Payload Data Input Interface
The Transmit Payload Data Input Interface permits the following configuration options.
• The Serial or the Nibble-Parallel Interface Mode
• The Loop-Timing or the TxInClk (Local Timing) Mode
If the XRT72L50 has been configured to operate in the TxInClk mode, then there are two additional options.
• The XRT72L50 functions as the Frame Master (e.g., it dictates when the Terminal Equipment initiates the
transmission of data within a new DS3 frame).
• The XRT72L50 functions as the Frame Slave (e.g., the Terminal Equipment dictates when the XRT72L50
initiates the transmission of a new DS3 frame).
Given these three set of options, the Transmit Terminal Input Interface can be configured to operate in one of
the six (6) following modes.
• Mode 1 - Serial/Loop-Timed Mode
• Mode 2 - Serial/Local-Timed/Frame Slave Mode
• Mode 3 - Serial/Local-Timed/Frame Master Mode
• Mode 4 - Nibble/Loop-Timed Mode
• Mode 5 - Nibble/Local-Timed/Frame Slave Mode
• Mode 6 - Nibble/Local-Timed/Frame Master Mode
4.2.1.1 Mode 1 - Serial/Loop-Timing Mode Behavior of the XRT72L50
The XRT72L50 configured to operate in this mode behaves as follows.
Loop-Timing
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