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XRT72L50 Datasheet, PDF (312/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
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RxE3 Configuration & Status Register - 2 (Address = 0x11)
BIT 7
RxLOF
Algo
R/W
X
BIT 6
RxLOF
RO
X
BIT 5
RxOOF
RO
X
BIT 4
RxLOS
RO
X
BIT 3
RxAIS
RO
X
BIT 2
BIT 1
Not Used
RO
RO
X
X
BIT 0
RxFERF
RO
X
Writing a “0” into this bit-field causes the Receive E3 Framer block to reside in the OOF Condition state for at
most 24 E3 frame periods. Writing a “1” into this bit-field causes the Receive E3 Framer block to reside in the
OOF Condition state for at most 8 E3 frame periods.
LOF (Loss of Framing) Condition State
If the Receive E3 Framer block enters the LOF Condition state, then the following things will happen.
• The Receive E3 Framer block will discard the most recent frame synchronization and,
• The Receive E3 Framer block will make an unconditional transition to the FAS Pattern Search state.
• The Receive E3 Framer block will notify the Microprocessor/Microcontroller of its transition to the LOF
Condition state, by generating the Change in LOF Condition interrupt. When this occurs, Bit 2 (LOF Interrupt
Status), within the Rx E3 Interrupt Status Register - 1 will be set to “1”, as depicted below.
RxE3 Interrupt Status Register - 1 (Address = 0x14)
BIT 7
BIT 6
Not Used
BIT 5
RO
RO
RO
0
0
0
BIT 4
COFA
Interrupt
Status
RUR
0
BIT 3
OOF
Interrupt
Status
RUR
0
BIT 2
LOF
Interrupt
Status
RUR
1
BIT 1
LOS
Interrupt
Status
RUR
0
BIT 0
AIS
Interrupt
Status
RUR
0
Finally, the Receive E3 Framer block will also inform the external circuitry of this transition to the LOF Condition
state by toggling the RxLOF output pin "High”.
5.3.2.2 The Framing Maintenance Mode
Once the Receive E3 Framer block enters the In-Frame state, then it will notify the Microprocessor/
Microcontroller of this fact by generating both the Change in OOF Condition and Change in LOF Condition
Interrupts. When this happens, bits 2 and 3 (LOF Interrupt Status and OOF Interrupt Status) will be set to “1”,
as depicted below.
RxE3 Interrupt Status Register - 1 (Address = 0x14)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
Not Used
COFA
Interrupt
Status
OOF
Interrupt
Status
RO
RO
RO
RUR
RUR
0
0
0
0
1
BIT 2
LOF
Interrupt
Status
RUR
1
BIT 1
LOS
Interrupt
Status
RUR
0
BIT 0
AIS
Interrupt
Status
RUR
0
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