XRT72L50 Datasheet, PDF (257/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

áç
XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
FIGURE 88. THE TERMINAL EQUIPMENT BEING INTERFACED TO THE TRANSMIT PAYLOAD DATA INPUT INTERFACE
BLOCK FOR MODE 1 (SERIAL/LOOP-TIMED) OPERATION
E3_Clock_In
E3_Data_Out
Tx_Start_of_Frame
E3_Overhead_Ind
34.368MHz
RxOutClk
TxSer
TxFrame
TxOH_Ind
NibIntf
Terminal Equipment
E3 Framer
Mode 1 Operation of the Terminal Equipment
When the XRT72L50 is operating in this mode, it will function as the source of the 34.368MHz clock signal.
This clock signal will be used as the Terminal Equipment Interface clock by both the XRT72L50 IC and the
Terminal Equipment.
The Terminal Equipment will serially output the payload data of the outbound E3 data stream via its
E3_Data_Out pin. The Terminal Equipment will update the data on the E3_Data_Out pin upon the rising edge
of the 34.368 MHz clock signal, at its E3_Clock_In input pin (as depicted in Figure 88 and Figure 89).
The XRT72L50 will latch the outbound E3 data stream (from the Terminal Equipment) on the rising edge of the
RxOutClk signal.
The XRT72L50 will indicate that it is processing the last bit, within a given outbound E3 frame, by pulsing its
TxFrame output pin "High" for one bit-period. When the Terminal Equipment detects this pulse at its
Tx_Start_of_Frame input, it is expected to begin transmission of the very next outbound E3 frame to the
XRT72L50 via the E3_Data_Out (or TxSer pin).
Finally, the XRT72L50 will indicate that it is about to process an overhead bit by pulsing the TxOH_Ind output
pin "High" one bit period prior to its processing of an OH (Overhead) bit. In Figure 88, the TxOH_Ind output pin
is connected to the E3_Overhead_Ind input pin of the Terminal Equipment. Whenever the E3_Overhead_Ind
pin is pulsed "High" the Terminal Equipment is expected to not transmit a E3 payload bit upon the very next
clock edge. Instead, the Terminal Equipment is expected to delay its transmission of the very next payload bit,
by one clock cycle.
The behavior of the signals, between the XRT72L50 and the Terminal Equipment, for E3 Mode 1 operation is
illustrated in Figure 88.
Inserting the A and N bits into the outbound E3 frames via the Transmit Payload Data Input Interface
block
The XRT72L50 DS3/E3 Framer permits the Terminal Equipment to insert its own values for the A and/or N bits,
into the outbound E3 frame, via the Transmit Payload Data Input Interface block. If the user desires to do this,
the XRT72L50 Framer IC must be configured to accept the Terminal Equipment’s value for the A and N bits, by
writing to appropriate data into the TxASourceSel[1:0] and TxNSourceSel[1:0] bit-fields, within the TxE3
Configuration Register (Address =0x30), as illustrated below.
244