XRT72L50 Datasheet, PDF (438/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
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Table 85 relates the number of rising clock edges (in the RxOHClk signal, since the RxOHFrame signal was
last sampled "High") to the E3 Overhead bit that is being output via the RxOH output pin.
TABLE 85: THE RELATIONSHIP BETWEEN THE NUMBER OF RISING CLOCK EDGES IN RXOHCLK, (SINCE
RXOHFRAME WAS LAST SAMPLED "HIGH") TO THE E3 OVERHEAD BIT, THAT IS BEING OUTPUT VIA THE RXOH
OUTPUT PIN
NUMBER OF RISING CLOCK EDGES IN RXOHCLK
0 (Clock edge is coincident with RxOHFrame being detected "High")
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
THE OVERHEAD BIT BEING OUTPUT BY THE
XRT72L50
FA1 Byte - Bit 7
FA1 Byte - Bit 6
FA1 Byte - Bit 5
FA1 Byte - Bit 4
FA1 Byte - Bit 3
FA1 Byte - Bit 2
FA1 Byte - Bit 1
FA1 Byte - Bit 0
FA2 Byte - Bit 7
FA2 Byte - Bit 6
FA2 Byte - Bit 5
FA2 Byte - Bit 4
FA2 Byte - Bit 3
FA2 Byte - Bit 2
FA2 Byte - Bit 1
FA2 Byte - Bit 0
EM Byte - Bit 7
EM Byte - Bit 6
EM Byte - Bit 5
EM Byte - Bit 4
EM Byte - Bit 3
EM Byte - Bit 2
EM Byte - Bit 1
EM Byte - Bit 0
TR Byte - Bit 7
TR Byte - Bit 6
TR Byte - Bit 5
TR Byte - Bit 4
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