XRT72L50 Datasheet, PDF (31/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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PIN DESCRIPTION
PIN #
93
PIN NAME
RxRed
94
RxOOF
95
RxLOS
96
RxOHClk/
RxHDLCClk
97
RxOHInd
XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. 1.2.1
TYPE
O
O
O
O
O
DESCRIPTION
Receiver Red Alarm Indicator - Receive Framer:
The Framer asserts this output pin to denote that one of the following events
has been detected by the Receive Framer:
LOS - Loss of Signal Condition
OOF - Out of Frame Condition
AIS - Alarm Indication Signal Detection
Receiver Out of Frame Indicator:
The Receive Section of the XRT72L50 Framer IC will assert this output signal
whenever it has declared an Out of Frame (OOF) condition with the incoming
DS3 or E3 frames. This signal is negated when the framer correctly locates
the framing alignment bits or bytes and correctly aligns itself with the incom-
ing DS3 or E3 frames.
Receive Section - Loss of Signal Output Indicator:
This pin is asserted when the Receive Section encounters a string of 180
consecutive 0's (for DS3 operation) or 32 consecutive 0's (for E3 operation)
via the RxPOS and RxNEG pins.
This pin will be negated once the Receive Section has detected at least 60
pulses within 180 bit-periods (for DS3 operation); or the Receive Section has
detected a string of 32 consecutive bits, that does not contain a string of 4
consecutive "0s" (for E3 operation).
Receive Overhead Output Clock Signal:
The XRT72L50 will output the Overhead bits (within the incoming DS3 or E3
frames), via the RxOH output pin, upon the falling edge of this clock signal.
As a consequence, the user's data link equipment should use the rising edge
of this clock signal to sample the data on both the RxOH and RxOHFrame
output pins.
NOTE: This clock signal is always active.
Receive HDLC Output Clock:
When the HDLC controller is on, RxHDLCDat is updated by the 72L53 on this
clock signal.
Receive Overhead Bit Indicator:
The exact functionality of this output pin depends upon whether the
XRT72L50 Framer IC is operating in the Serial or Nibble-Parallel Mode.
Serial Mode Operation:
This output pin pulses "High" (for one bit-period) whenever an overhead bit is
being output via the RxSer output pin, by the Receive Payload Data Output
Interface block.
Nibble-Parallel Mode Operation:
This output pin pulses "High" (for one nibble-period) whenever an overhead
nibble is being output via the RxNib[3:0] output pins, by the Receive Payload
Data Output Interface block.
NOTE: The purpose of this output pin is to alert the Receive Terminal Equip-
ment that an overhead bit is being output via the RxSer output pin, and that
this data should be ignored.
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