XRT72L50 Datasheet, PDF (140/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
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3.2 Bit-Fields within the Line Interface Scan Register
The XRT73L0x contains three output pins which can be made accessible to the Microprocessor Interface, via
the Line Interface Scan register. These three output pins are listed below.
• DMO - Drive Monitor Output
• RLOL - Receive Loss of Lock Indicator
• RLOS - Receive Loss of Signal Indicator.
The logic state of each of these input pins (or output pins from the LIU) can be monitored by reading the
contents of the Line Interface Scan register, as depicted below.
Line Interface Scan Register (Address = 0x81)
BIT 7
RO
0
BIT 6
RO
0
BIT 5
Not Used
RO
0
BIT 4
RO
0
BIT 3
RO
0
BIT 2
DMO
RO
0
BIT 1
RLOL
RO
1
BIT 0
RLOS
RO
1
Bit 2 - DMO - Drive Monitor Output
This Read-Only bit-field indicates the logic state of the DMO output pin of the Framer. This input pin is
intended to be connected to the DMO output pin of the XRT73L0x DS3/E3/STS-1 LIU IC. If this bit-field
contains a logic “1”, then the DMO input pin is "High”. The XRT73L0x DS3/E3/STS-1 LIU IC will set this pin
"High” if the Transmit Driver Monitor circuitry (within the XRT73L0x) has not detected any bipolar signals at the
MTIP and MRING inputs (of the XRT73L0x) within the last 128 + 32 bit periods.
Conversely, if this bit-field is set to “0”, then the DMO input pin is "Low”. The XRT73L0x DS3/E3/STS-1 LIU IC
will set this pin "Low” if bipolar signals are being detected at the MTIP and MRING input pins.
For more information on the user/purpose of the Drive Monitor feature, within the XRT73L0x LIU IC, refer to the
XRT73L0x DS3/E3/STS-1 LIU IC Data Sheet.
NOTE: If this customer is not using the XRT73L0x DS3/E3/STS-1 LIU IC, then this register bit-field and input pin can be
used for a variety of other purposes.
Bit 1 - RLOL - Receive Loss of Lock
This Read-Only bit-field indicates the logic state of the RLOL input pin of the Framer. This input pin is intended
to be connected to the RLOL output pin of the XRT73L0x DS3/E3/STS-1 LIU IC. If this bit-field contains a logic
“1”, then the RLOL input pin is "High”. The XRT73L0x LIU IC will drive this pin "High” if the clock recovery
phase locked loop circuitry (within the XRT73L0x) has lost lock with the incoming DS3 or E3 data-stream and is
not properly recovering clock and data.
Conversely, if this bit-field contains a logic “0”, then the RLOL input pin is "Low”. The XRT73L0x DS3/E3/STS-
1 LIU IC will hold this pin "Low” for as long as this clock recovery phase-locked-loop circuit (within the
XRT73L0x) is properly locked onto the incoming DS3 or E3 data stream and is properly recovering clock and
data from this data stream.
Bit 0 - RLOS- Receive Loss of Signal
This Read-Only bit-field indicates the logic state of the RLOS input pin of the Framer. This input pin is intended
to be connected to the RLOS output pin of the XRT73L0x DS3/E3/STS-1 LIU IC. If this bit-field contains a logic
“1”, then the RLOS input pin is "High”. The XRT73L0x LIU IC will drive this signal "High” if it is currently
declaring an LOS (Loss of Signal) condition.
Conversely, if this bit-field contains a logic “0”, then the RLOS input pin is "Low”. The XRT73L0x LIU IC will
drive this signal "Low”, if it is NOT currently declaring an LOS (Loss of Signal) condition.
For more information on the LOS Declaration/Clearance criteria, used by the XRT73L0x, refer to the
XRT73L0x DS3/E3/STS-1 LIU IC Data Sheet.
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