XRT72L50 Datasheet, PDF (24/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. 1.2.1
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PIN DESCRIPTION
PIN #
64
PIN NAME
TxNEG
65
TxPOS
66
ENCODIS
TYPE
O
O
O
DESCRIPTION
Transmit Negative Polarity Pulse:
The exact role of this output pin depends upon whether the Framer is operat-
ing in the Unipolar or Bipolar Mode.
Unipolar Mode:
This output signal pulses "High" for one bit period, at the end of each out-
bound DS3 or E3 frame. This output signal is at a logic "Low" for all of the
remaining bit-periods of the outbound DS3 or E3 frames
Bipolar Mode:
This output pin functions as one of the two dual-rail output signals that com-
mands the sequence of pulses to be driven on the line. TxPOS is the other
output pin. This input is typically connected to the TNDATA input of the exter-
nal DS3/E3 Line Interface Unit IC. When this output is asserted, it will com-
mand the LIU to generate a negative polarity pulse on the line.
Transmit Positive Polarity Pulse:
The exact role of this output pin depends upon whether the Framer is operat-
ing in the Unipolar or Bipolar Mode.
Unipolar Mode:
This output pin functions as the Single-Rail output signal for the outbound
DS3 or E3 data stream. The signal, at this output pin, will be updated on the
user-selected edge of the TxLineClk signal.
Bipolar Mode:
This output pin functions as one of the two dual rail output signals that com-
mands the sequence of pulses to be driven on the line. TxNEG is the other
output pin. This input is typically connected to the TPDATA input of the exter-
nal DS3 or E3 Line Interface Unit IC. When this output is asserted, it will com-
mand the LIU to generate a positive polarity pulse on the line
Encoder (HDB3) Disable Output pin (intended to be connected to the
XRT73L00 DS3/E3 Line Interface Unit IC):
This output pin is intended to be connected to the ENDECDIS input pin of the
XRT73L00 DS3/E3 Line Interface Unit IC when the device is being used in
Hardware mode. The user can control the state of this output pin by writing a
"0" or "1" to Bit 3 (Encodis) within the Line Interface Driver Register (Address
= 0x80). If the user commands this signal to toggle "High" then it will disable
the B3ZS/HDB3 encoder circuitry within the XRT73L00 IC. Conversely, if the
user commands this output signal to toggle "Low", then the B3ZS/HDB3
Encoder circuitry, within the XRT73L00 IC will be enabled.
The user is advised to disable the B3ZS/HDB3 encoder (within the XRT73L00
IC) if the XRT72L50 Framer IC has been configured to operate in the B3ZS/
HDB3 line code.
NOTE: If the customer is not using the XRT73L00 DS3/E3 Line Interface Unit
IC, then this output pin may be used for other purposes.
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