XRT72L50 Datasheet, PDF (27/471 Pages) Exar Corporation – SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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PIN DESCRIPTION
PIN #
75
PIN NAME
RxNEG
76
RxPOS
77
RLOL
XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. 1.2.1
TYPE
I
I
I
DESCRIPTION
Receive Negative Data Input:
The exact role of this input pin depends upon whether the Framer is operating
in the Unipolar or Bipolar Mode.
Unipolar Mode:
This input pin is inactive, and should be pulled ("Low" or "High") when the
Framer is operating in the Unipolar Mode.
Bipolar Mode:
This input pin functions as one of the dual rail inputs for the incoming AMI/
HDB3 encoded DS3 or E3 data that has been received from an external Line
Interface Unit (LIU) IC. RxPOS functions as the other dual rail input for the
Framer. When this input pin is asserted, it means that the LIU has received a
negative polarity pulse from the line.
Receive Positive Data Input:
The exact role of this input pin depends upon whether the Framer is operating
in the Unipolar or Bipolar Mode.
Unipolar Mode:
This input pin functions as the Single-Rail input for the incoming E3 data
stream. The signal at this input pin will be sampled and latched (into the
Receive DS3/E3 Framer) on the user-selected edge of the RxLineClk signal.
Bipolar Mode:
This input functions as one of the dual rail inputs for the incoming AMI/HDB3
encoded DS3 or E3 data that has been received from an external Line Inter-
face Unit (LIU) IC. RxNEG functions as the other dual rail input for the Framer.
When this input pin is asserted, it means that the LIU has received a positive
polarity pulse from the line.
Receive Loss of Lock Indicator - from the XRT73L00 DS3/E3 Line Inter-
face Unit IC:
This input pin is intended to be connected to the RLOL (Receive Loss of Lock)
output pin of the XRT73L00 Line Interface Unit IC. The user can monitor the
state of this pin by reading the state of Bit 1 (RLOL) within the Line Interface
Scan Register (Address = 0x81).
If this input pin is "Low", then it means that the clock recovery phase-locked-
loop circuitry, within the XRT73L00 is properly locked onto the incoming DS3
E3 data-stream; and is properly recovering clock and data from this DS3/E3
data-stream. However, if this input pin is "High", then it means that the phase-
locked-loop circuitry, within the XRT73L00 has lost lock with the incoming
DS3 or E3 data-stream, and is not properly recovering clock and data.
For more information on the operation of the XRT73L00 DS3/E3 Line Inter-
face Unit IC, please consult the XRT73L00 DS3/E3 Line Interface Unit data
sheet.
NOTE: If the customer is not using the XRT73L00 DS3/E3 Line Interface Unit
IC, then this output pin may be used for other purposes.
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