PIC24FJ64GA705 Datasheet, PDF (95/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 8-5:
U-0
—
bit 15
INTCON4: INTERRUPT CONTROL REGISTER 4
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
U-0
U-0
—
—
bit 8
U-0
—
bit 7
U-0
U-0
U-0
U-0
—
—
—
—
U-0
R/C-0
R/C-0
—
ECCDBE
SGHT
bit 0
Legend:
R = Readable bit
-n = Value at POR
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-2
bit 1
bit 0
Unimplemented: Read as ‘0’
ECCDBE: ECC Double-Bit Error Trap bit
1 = ECC Double-Bit Error trap has occurred
0 = ECC Double-Bit Error trap has not occurred
SGHT: Software Generated Hard Trap Status bit
1 = Software generated hard trap has occurred
0 = Software generated hard trap has not occurred
 2016 Microchip Technology Inc.
DS30010118B-page 95