PIC24FJ64GA705 Datasheet, PDF (251/412 Pages) –

PIC24FJ256GA705 FAMILY
21.0 REAL-TIME CLOCK AND
CALENDAR (RTCC) WITH
TIMESTAMP
Note:
This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information on the
Real-Time Clock and Calendar, refer to
the “dsPIC33/PIC24 Family Reference
Manual”, “RTCC with Timestamp”
(DS70005193), which is available from the
Microchip web site (www.microchip.com).
The information in this data sheet
supersedes the information in the FRM.
The RTCC provides the user with a Real-Time Clock
and Calendar (RTCC) function that can be calibrated.
Key features of the RTCC module are:
• Selectable Clock Source
• Provides Hours, Minutes and Seconds Using
24-Hour Format
• Visibility of One Half Second Period
• Provides Calendar – Weekday, Date, Month
and Year
• Alarm-Configurable for Half a Second, 1 Second,
10 Seconds, 1 Minute, 10 Minutes, 1 Hour, 1 Day,
1 Week, 1 Month or 1 Year
• Alarm Repeat with Decrementing Counter
• Alarm with Indefinite Repeat Chime
• Year 2000 to 2099 Leap Year Correction
• BCD Format for Smaller Software Overhead
• Optimized for Long-Term Battery Operation
• User Calibration of the 32.768 kHz Clock Crystal/
32K INTRC Frequency with Periodic Auto-Adjust
• Fractional Second Synchronization
• Calibration to within ±2.64 Seconds Error
per Month
• Calibrates up to 260 ppm of Crystal Error
• Ability to Periodically Wake-up External Devices
without CPU Intervention (external power control)
• Power Control Output for External Circuit Control
• Calibration takes Effect Every 15 Seconds
• Timestamp Capture register for Time and Date
• Programmable Prescaler and Clock Divider
Circuit allows Operation with Any Clock Source
up to 32 MHz, Including 32.768 kHz Crystal,
50/60 Hz Powerline Clock, External Real-Time
Clock (RTC) or 31.25 kHz LPRC Clock
21.1 RTCC Source Clock
The RTCC clock divider block converts the incoming
oscillator source into accurate 1/2 and 1 second clocks
for the RTCC. The clock divider is optimized to work
with three different oscillator sources:
• 32.768 kHz crystal oscillator
• 31 kHz Low-Power RC Oscillator (LPRC)
• External 50 Hz or 60 Hz powerline frequency
An asynchronous prescaler, PS<1:0> (RTCCON2L<5:4>),
is provided that allows the RTCC to work with higher
speed clock sources, such as the system clock. Divide
ratios of 1:16, 1:64 or 1:256 may be selected, allowing
sources up to 32 MHz to clock the RTCC.
21.1.1 COARSE FREQUENCY DIVISION
The clock divider block has a 16-bit counter used to
divide the input clock frequency. The divide ratio is set
by the DIV<15:0> register bits (RTCCON2H<15:0>).
The DIV<15:0> bits should be programmed with a
value to produce a nominal 1/2 second clock divider
count period.
21.1.2 FINE FREQUENCY DIVISION
The fine frequency division is set using the FDIV<4:0>
(RTCCON2L<15:11>) bits. Increasing the FDIVx value
will lengthen the overall clock divider period.
If FDIV<4:0> = 00000, the fine frequency division circuit
is effectively disabled. Otherwise, it will optionally
remove a clock pulse from the input of the clock divider
every 1/2 second. This functionality will allow the user to
remove up to 31 pulses over a fixed period of
16 seconds, depending on the value of FDIVx.
The value for DIV<15:0> is calculated as shown in
Equation 21-1. The fractional remainder of the
DIV<15:0> calculation result can be used to calculate
the value for FDIV<4:0>.
EQUATION 21-1: RTCC CLOCK DIVIDER
OUTPUT FREQUENCY
FIN
( ) FOUT =
2 • (PS<1:0> Prescaler) • (DIV<15:0> + 1) +
FDIV<4:0>
32
The DIV<15:0> value is the integer part of this calculation:
FIN
DIV<15:0> =
–1
2 • (PS<1:0> Prescaler)
The FDIV<4:0> value is the fractional part of the DIV<15:0>
calculation, multiplied by 32.
 2016 Microchip Technology Inc.
DS30010118B-page 251