PIC24FJ64GA705 Datasheet, PDF (331/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 29-2: FBSLIM CONFIGURATION REGISTER
U-1
U-1
U-1
U-1
U-1
U-1
U-1
U-1
—
—
—
—
—
—
—
—
bit 23
bit 16
U-1
U-1
U-1
R/PO-1
R/PO-1
R/PO-1
R/PO-1
R/PO-1
—
—
—
BSLIM<12:8>
bit 15
bit 8
R/PO-1
bit 7
R/PO-1
R/PO-1
R/PO-1
R/PO-1
BSLIM<7:0>
R/PO-1
R/PO-1
R/PO-1
bit 0
Legend:
R = Readable bit
-n = Value at POR
PO = Program Once bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 23-13
bit 12-0
Unimplemented: Read as ‘1’
BSLIM<12:0>: Active Boot Segment Code Flash Page Address Limit (Inverted) bits
This bit field contains the last active Boot Segment Page + 1 (i.e., first page address of GS). The value
is stored as an inverted page address, such that programming additional ‘0’s can only increase the size
of BS. If BSLIM<12:0> is set to all ‘1’s (unprogrammed default), the active Boot Segment size is zero.
 2016 Microchip Technology Inc.
DS30010118B-page 331