PIC24FJ64GA705 Datasheet, PDF (83/412 Pages) –

PIC24FJ256GA705 FAMILY
TABLE 7-3: RESET DELAY TIMES FOR VARIOUS DEVICE RESETS
Reset Type
Clock Source
SYSRST Delay
System Clock
Delay
Notes
POR
EC
TPOR + TSTARTUP + TRST
—
1, 2, 3
ECPLL
TPOR + TSTARTUP + TRST
TLOCK
1, 2, 3, 5
XT, HS, SOSC
TPOR + TSTARTUP + TRST
TOST
1, 2, 3, 4
XTPLL, HSPLL
TPOR + TSTARTUP + TRST
TOST + TLOCK 1, 2, 3, 4, 5
FRC, OSCFDIV
TPOR + TSTARTUP + TRST
TFRC
1, 2, 3, 6, 7
FRCPLL
TPOR + TSTARTUP + TRST
TFRC + TLOCK 1, 2, 3, 5, 6
LPRC
TPOR + TSTARTUP + TRST
TLPRC
1, 2, 3, 6
BOR
EC
TSTARTUP + TRST
—
2, 3
ECPLL
TSTARTUP + TRST
TLOCK
2, 3, 5
XT, HS, SOSC
TSTARTUP + TRST
TOST
2, 3, 4
XTPLL, HSPLL
TSTARTUP + TRST
TOST + TLOCK 2, 3, 4, 5
FRC, OSCFDIV
TSTARTUP + TRST
TFRC
2, 3, 6, 7
FRCPLL
TSTARTUP + TRST
TFRC + TLOCK 2, 3, 5, 6
LPRC
TSTARTUP + TRST
TLPRC
2, 3, 6
MCLR
Any Clock
TRST
—
3
WDT
Any Clock
TRST
—
3
Software
Any clock
TRST
—
3
Illegal Opcode Any Clock
TRST
—
3
Uninitialized W Any Clock
TRST
—
3
Trap Conflict Any Clock
TRST
—
3
Note 1:
2:
3:
4:
TPOR = Power-on Reset delay (10 s nominal).
TSTARTUP = TVREG.
TRST = Internal State Reset Time (2 s nominal).
TOST = Oscillator Start-up Timer (OST). A 10-bit counter counts 1024 oscillator periods before releasing
the oscillator clock to the system.
5: TLOCK = PLL Lock Time.
6: TFRC and TLPRC = RC Oscillator Start-up Times.
7: If Two-Speed Start-up is enabled, regardless of the Primary Oscillator selected, the device starts with FRC
so the system clock delay is just TFRC, and in such cases, FRC start-up time is valid; it switches to the
Primary Oscillator after its respective clock delay.
 2016 Microchip Technology Inc.
DS30010118B-page 83