PIC24FJ64GA705 Datasheet, PDF (4/412 Pages) –

PIC24FJ256GA705 FAMILY
Pin Diagrams (PIC24FJ256GA702 Devices)
28-Pin SOIC, SSOP, SPDIP
MCLR 1
RA0 2
RA1 3
RB0 4
RB1 5
RB2 6
RB3 7
VSS 8
RA2 9
RA3 10
RB4 11
RA4 12
VDD 13
RB5 14
28 AVDD/VDD
27 AVSS/VSS
26 RB15
25 RB14
24 RB13
23 RB12
22 RB11
21 RB10
20 VCAP
19 VSS
18 RB9
17 RB8
16 RB7
15 RB6
Legend: See Table 2 for a complete description of pin functions. Pinouts are subject to change.
Note: Gray shading indicates 5.5V tolerant input pins.
TABLE 2: COMPLETE PIN FUNCTION DESCRIPTIONS (PIC24FJ256GA702 SOIC, SSOP, SPDIP)
Pin
Function
Pin
Function
1 MCLR
15 PGC3/RP6/ASCL1/OCM1F/RB6
2 VREF+/CVREF+/AN0/C3INC/RP26/CTED1/RA0
16 RP7/OCM1A/CTED3/INT0/RB7
3 VREF-/CVREF-/AN1/C3IND/RP27/CTED2/RA1
17 TCK/RP8/SCL1/OCM1B/CTED10/RB8
4 PGD1/AN2/CTCMP/C2INB/RP0/RB0
18 TDO/C1INC/C2INC/C3INC/TMPRN/RP9/SDA1/T1CK/CTED4/RB9
5 PGC1/AN1-/AN3/C2INA/RP1/CTED12/RB1
19 VSS
6 AN4/C1INB/RP2/SDA2/CTED13/RB2
20 VCAP
7 AN5/C1INA/RP3/SCL2/CTED8/RB3
21 PGD2/TDI/RP10/OCM1C/CTED11/RB10
8 VSS
22 PGC2/TMS/REFI1/RP11/CTED9/RB11
9 OSCI/CLKI/C1IND/RA2
23 AN8/LVDIN/RP12/RB12
10 OSCO/CLKO/C2IND/RA3
24 AN7/C1INC/RP13/OCM1D/CTPLS/RB13
11 SOSCI/RP4/RB4
25 CVREF/AN6/C3INB/RP14/CTED5/RB14
12 SOSCO/PWRLCLK/RA4
26 AN9/C3INA/RP15/CTED6/RB15
13 VDD
27 AVSS/VSS
14 PGD3/RP5/ASDA1/OCM1E/RB5
28 AVDD/VDD
Legend: RPn represents remappable pins for Peripheral Pin Select (PPS) functions.
Note: Pinouts are subject to change.
DS30010118B-page 4
 2016 Microchip Technology Inc.