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PIC24FJ64GA705 Datasheet, PDF (209/412 Pages) –
PIC24FJ256GA705 FAMILY
REGISTER 17-4: SPIxSTATL: SPIx STATUS REGISTER LOW
U-0
—
bit 15
U-0
U-0 R/C-0, HS R-0, HSC
U-0
—
—
FRMERR SPIBUSY
—
U-0
R-0, HSC
—
SPITUR(1)
bit 8
R-0, HSC R/C-0, HS R-1, HSC U-0
R-1, HSC
U-0
SRMT SPIROV SPIRBE
—
SPITBE
—
bit 7
R-0, HSC
SPITBF
R-0, HSC
SPIRBF
bit 0
Legend:
R = Readable bit
-n = Value at POR
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
HS = Hardware Settable bit x = Bit is unknown
‘0’ = Bit is cleared
HSC = Hardware Settable/Clearable bit
U = Unimplemented bit, read as ‘0’
bit 15-13
bit 12
bit 11
bit 10-9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
Unimplemented: Read as ‘0’
FRMERR: SPIx Frame Error Status bit
1 = Frame error is detected
0 = No frame error is detected
SPIBUSY: SPIx Activity Status bit
1 = Module is currently busy with some transactions
0 = No ongoing transactions (at time of read)
Unimplemented: Read as ‘0’
SPITUR: SPIx Transmit Underrun Status bit(1)
1 = Transmit buffer has encountered a Transmit Underrun condition
0 = Transmit buffer does not have a Transmit Underrun condition
SRMT: Shift Register Empty Status bit
1 = No current or pending transactions (i.e., neither SPIxTXB or SPIxTXSR contains data to transmit)
0 = Current or pending transactions
SPIROV: SPIx Receive Overflow Status bit
1 = A new byte/half-word/word has been completely received when the SPIxRXB is full
0 = No overflow
SPIRBE: SPIx RX Buffer Empty Status bit
1 = RX buffer is empty
0 = RX buffer is not empty
Standard Buffer Mode:
Automatically set in hardware when SPIxBUF is read from, reading SPIxRXB. Automatically cleared in
hardware when SPIx transfers data from SPIxRXSR to SPIxRXB.
Enhanced Buffer Mode:
Indicates RXELM<5:0> = 6’b000000.
Unimplemented: Read as ‘0’
SPITBE: SPIx Transmit Buffer Empty Status bit
1 = SPIxTXB is empty
0 = SPIxTXB is not empty
Standard Buffer Mode:
Automatically set in hardware when SPIx transfers data from SPIxTXB to SPIxTXSR. Automatically
cleared in hardware when SPIxBUF is written, loading SPIxTXB.
Enhanced Buffer Mode:
Indicates TXELM<5:0> = 6’b000000.
Note 1: SPITUR is cleared when SPIEN = 0. When IGNTUR = 1, SPITUR provides dynamic status of the Transmit
Underrun condition, but does not stop RX/TX operation and does not need to be cleared by software.
 2016 Microchip Technology Inc.
DS30010118B-page 209