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PIC24FJ64GA705 Datasheet, PDF (227/412 Pages) –
PIC24FJ256GA705 FAMILY
REGISTER 18-3: I2CxSTAT: I2Cx STATUS REGISTER
HSC, R-0 HSC, R-0 HSC, R-0
U-0
U-0
ACKSTAT TRSTAT ACKTIM
—
—
bit 15
HSC, R/C-0
BCL
HSC, R-0
GCSTAT
HSC, R-0
ADD10
bit 8
HS, R/C-0
IWCOL
bit 7
HS, R/C-0 HSC, R-0 HSC, R/C-0 HSC, R/C-0
I2COV
D/A
P
S
HSC, R-0
R/W
HSC, R-0
RBF
HSC, R-0
TBF
bit 0
Legend:
R = Readable bit
-n = Value at POR
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
HS = Hardware Settable bit
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
HSC = Hardware Settable/Clearable bit
bit 15
bit 14
bit 13
bit 12-11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
ACKSTAT: Acknowledge Status bit (updated in all Master and Slave modes)
1 = Acknowledge was not received from slave
0 = Acknowledge was received from slave
TRSTAT: Transmit Status bit (when operating as I2C master; applicable to master transmit operation)
1 = Master transmit is in progress (8 bits + ACK)
0 = Master transmit is not in progress
ACKTIM: Acknowledge Time Status bit (valid in I2C Slave mode only)
1 = Indicates I2C bus is in an Acknowledge sequence, set on 8th falling edge of SCLx clock
0 = Not an Acknowledge sequence, cleared on 9th rising edge of SCLx clock
Unimplemented: Read as ‘0’
BCL: Bus Collision Detect bit (Master/Slave mode; cleared when I2C module is disabled, I2CEN = 0)
1 = A bus collision has been detected during a master or slave transmit operation
0 = No bus collision has been detected
GCSTAT: General Call Status bit (cleared after Stop detection)
1 = General call address was received
0 = General call address was not received
ADD10: 10-Bit Address Status bit (cleared after Stop detection)
1 = 10-bit address was matched
0 = 10-bit address was not matched
IWCOL: I2Cx Write Collision Detect bit
1 = An attempt to write to the I2CxTRN register failed because the I2C module is busy; must be cleared
in software
0 = No collision
I2COV: I2Cx Receive Overflow Flag bit
1 = A byte was received while the I2CxRCV register is still holding the previous byte; I2COV is a “don’t
care” in Transmit mode, must be cleared in software
0 = No overflow
D/A: Data/Address bit (when operating as I2C slave)
1 = Indicates that the last byte received was data
0 = Indicates that the last byte received or transmitted was an address
P: I2Cx Stop bit
Updated when Start, Reset or Stop is detected; cleared when the I2C module is disabled, I2CEN = 0.
1 = Indicates that a Stop bit has been detected last
0 = Stop bit was not detected last
 2016 Microchip Technology Inc.
DS30010118B-page 227