PIC24FJ64GA705 Datasheet, PDF (17/412 Pages) –

PIC24FJ256GA705 FAMILY
TABLE 1-1: DEVICE FEATURES FOR THE PIC24FJXXXGA702: 28-PIN DEVICES
Features
PIC24FJ64GA702
PIC24FJ128GA702
PIC24FJ256GA702
Operating Frequency
DC – 32 MHz
Program Memory (bytes)
64K
128K
256K
Program Memory
(instruction words, 24 bits)
22,528
45,056
88,064
Data Memory (bytes)
16K
Interrupt Sources
124
(soft vectors/NMI traps)
I/O Ports
Ports A, B
Total I/O Pins
22
Remappable Pins
18 (18 I/Os, 0 input only)
DMA
1 6-channel
16-Bit Timers
3⁽¹⁾
Real-Time Clock and Calendar
Yes
(RTCC)
Cyclic Redundancy Check (CRC)
Yes
Input Capture Channels
3⁽¹⁾
Output Compare/PWM Channels
3⁽¹⁾
Input Change Notification Interrupt
21 (remappable pins)
Serial Communications:
UART
2⁽¹⁾
SPI (3-wire/4-wire)
3⁽¹⁾
I²C
2
Configurable Logic Cell (CLC)
2⁽¹⁾
Parallel Communications
No
(EPMP/PSP)
Capture/Compare/PWM/Timer
Modules
4 Multiple CCPs
1 (6-output), 3 (2-output)
JTAG Boundary Scan
Yes
10/12-Bit Analog-to-Digital Converter
10
(A/D) Module (input channels)
Analog Comparators
3
CTMU Interface
Yes
Universal Serial Bus Controller
No
Resets (and Delays)
Core POR, VDD POR, BOR, RESET Instruction,
MCLR, WDT, Illegal Opcode, REPEAT Instruction,
Hardware Traps, Configuration Word Mismatch
(OST, PLL Lock)
Instruction Set
76 Base Instructions, Multiple Addressing Mode Variations
Packages
28-Pin QFN, UQFN, SOIC, SSOP and SPDIP
Note 1: Some peripherals are accessible through remappable pins.
 2016 Microchip Technology Inc.
DS30010118B-page 17