PIC24FJ64GA705 Datasheet, PDF (258/412 Pages) –

PIC24FJ256GA705 FAMILY
REGISTER 21-5: RTCCON3L: RTCC CONTROL REGISTER 3 (LOW)
R/W-0
PWCSAMP7
bit 15
R/W-0
PWCSAMP6
R/W-0
PWCSAMP5
R/W-0
PWCSAMP4
R/W-0
PWCSAMP3
R/W-0
R/W-0
R/W-0
PWCSAMP2 PWCSAMP1 PWCSAMP0
bit 8
R/W-0
PWCSTAB7
bit 7
R/W-0
PWCSTAB6
R/W-0
PWCSTAB5
R/W-0
PWCSTAB4
R/W-0
PWCSTAB3
R/W-0
R/W-0
R/W-0
PWCSTAB2 PWCSTAB1 PWCSTAB0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-8
bit 7-0
PWCSAMP<7:0>: Power Control Sample Window Timer bits
11111111 = Sample window is always enabled, even when PWCEN = 0
11111110 = Sample window is 254 TPWCCLK clock periods
•
•
•
00000001 = Sample window is 1 TPWCCLK clock period
00000000 = No sample window
PWCSTAB<7:0>: Power Control Stability Window Timer bits⁽¹⁾
11111111 = Stability window is 255 TPWCCLK clock periods
11111110 = Stability window is 254 TPWCCLK clock periods
•
•
•
00000001 = Stability window is 1 TPWCCLK clock period
00000000 = No stability window; sample window starts when the alarm event triggers
Note 1: The sample window always starts when the stability window timer expires, except when its initial value is 00h.
DS30010118B-page 258
 2016 Microchip Technology Inc.