PIC24FJ64GA705 Datasheet, PDF (352/412 Pages) –

PIC24FJ256GA705 FAMILY
TABLE 31-2: INSTRUCTION SET OVERVIEW (CONTINUED)
Assembly
Mnemonic
Assembly Syntax
Description
BTSS
BTSS
f,#bit4
Bit Test f, Skip if Set
BTSS
Ws,#bit4
Bit Test Ws, Skip if Set
BTST
BTSTS
CALL
CLR
CLRWDT
COM
CP
CP0
CPB
CPSEQ
BTST
BTST.C
BTST.Z
BTST.C
BTST.Z
BTSTS
BTSTS.C
BTSTS.Z
CALL
CALL
CLR
CLR
CLR
CLRWDT
COM
COM
COM
CP
CP
CP
CP0
CP0
CPB
CPB
CPB
f,#bit4
Ws,#bit4
Ws,#bit4
Ws,Wb
Ws,Wb
f,#bit4
Ws,#bit4
Ws,#bit4
lit23
Wn
f
WREG
Ws
f
f,WREG
Ws,Wd
f
Wb,#lit5
Wb,Ws
f
Ws
f
Wb,#lit5
Wb,Ws
CPSEQ Wb,Wn
Bit Test f
Bit Test Ws to C
Bit Test Ws to Z
Bit Test Ws<Wb> to C
Bit Test Ws<Wb> to Z
Bit Test then Set f
Bit Test Ws to C, then Set
Bit Test Ws to Z, then Set
Call Subroutine
Call Indirect Subroutine
f = 0x0000
WREG = 0x0000
Ws = 0x0000
Clear Watchdog Timer
f=f
WREG = f
Wd = Ws
Compare f with WREG
Compare Wb with lit5
Compare Wb with Ws (Wb – Ws)
Compare f with 0x0000
Compare Ws with 0x0000
Compare f with WREG, with Borrow
Compare Wb with lit5, with Borrow
Compare Wb with Ws, with Borrow
(Wb – Ws – C)
Compare Wb with Wn, Skip if =
CPSGT
CPSGT Wb,Wn
Compare Wb with Wn, Skip if >
CPSLT
CPSLT Wb,Wn
Compare Wb with Wn, Skip if <
CPSNE
CPSNE Wb,Wn
Compare Wb with Wn, Skip if 
DAW
DEC
DEC2
DISI
DIV
EXCH
FF1L
FF1R
DAW.B
DEC
DEC
DEC
DEC2
DEC2
DEC2
DISI
DIV.SW
DIV.SD
DIV.UW
DIV.UD
EXCH
FF1L
FF1R
Wn
f
f,WREG
Ws,Wd
f
f,WREG
Ws,Wd
#lit14
Wm,Wn
Wm,Wn
Wm,Wn
Wm,Wn
Wns,Wnd
Ws,Wnd
Ws,Wnd
Wn = Decimal Adjust Wn
f = f –1
WREG = f –1
Wd = Ws – 1
f=f–2
WREG = f – 2
Wd = Ws – 2
Disable Interrupts for k Instruction Cycles
Signed 16/16-bit Integer Divide
Signed 32/16-bit Integer Divide
Unsigned 16/16-bit Integer Divide
Unsigned 32/16-bit Integer Divide
Swap Wns with Wnd
Find First One from Left (MSb) Side
Find First One from Right (LSb) Side
# of # of Status Flags
Words Cycles
Affected
1
1 None
(2 or 3)
1
1 None
(2 or 3)
1
1Z
1
1C
1
1Z
1
1C
1
1Z
1
1Z
1
1C
1
1Z
2
2 None
1
2 None
1
1 None
1
1 None
1
1 None
1
1 WDTO, Sleep
1
1 N, Z
1
1 N, Z
1
1 N, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 None
(2 or 3)
1
1 None
(2 or 3)
1
1 None
(2 or 3)
1
1 None
(2 or 3)
1
1C
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 C, DC, N, OV, Z
1
1 None
1
18 N, Z, C, OV
1
18 N, Z, C, OV
1
18 N, Z, C, OV
1
18 N, Z, C, OV
1
1 None
1
1C
1
1C
DS30010118B-page 352
 2016 Microchip Technology Inc.