PIC24FJ64GA705 Datasheet, PDF (403/412 Pages) –

PIC24FJ256GA705 FAMILY
G
Guidelines for Getting Started with 16-Bit MCUs ................ 29
H
High/Low-Voltage Detect (HLVD) ..................................... 327
High/Low-Voltage Detect. See HLVD.
I
I/O Ports ............................................................................ 125
Analog Port Pins Configuration (ANSx) .................... 126
Configuring Analog/Digital Function of I/O Pins........ 126
Control Registers ...................................................... 129
Input Voltage Levels for Port/Pin Tolerated
Description Input ............................................... 126
Open-Drain Configuration ......................................... 126
Parallel (PIO) ............................................................ 125
Peripheral Pin Select ................................................ 136
PORTA Pin and ANSELx Availability........................ 127
PORTB Pin and ANSELx Availability........................ 127
PORTC Pin and ANSELx Availability........................ 127
Write/Read Timing .................................................... 126
I²C
Clock Rates............................................................... 223
Communicating as Master in Single
Master Environment.......................................... 221
Reserved Addresses................................................. 223
Setting Baud Rate as Bus Master............................. 223
Slave Address Masking ............................................ 223
ICSP Pins............................................................................ 32
In-Circuit Debugger ........................................................... 344
Input Capture
32-Bit Cascaded Mode ............................................. 168
Operations ................................................................ 168
Synchronous and Trigger Modes.............................. 167
Input Capture with Dedicated Timers................................ 167
Instruction Set
Overview ................................................................... 351
Summary................................................................... 349
Symbols Used in Opcode Descriptions..................... 350
Interfacing Program and Data Memory Spaces .................. 58
Inter-Integrated Circuit. See I²C.
Internet Address................................................................ 407
Interrupt Controller .............................................................. 85
Alternate Interrupt Vector Table (AIVT) ...................... 85
Control and Status Registers ...................................... 90
IEC0-IEC7........................................................... 90
IFS0-IFS7 ........................................................... 90
INTCON1 ............................................................ 90
INTCON2 ............................................................ 90
INTCON4 ............................................................ 90
INTTREG ............................................................ 90
IPC0-IPC29......................................................... 90
Interrupt Vector Details ............................................... 87
Interrupt Vector Table (IVT) ........................................ 85
Reset Sequence ......................................................... 85
Resources................................................................... 90
Interrupt-on-Change (IOC) ................................................ 128
Interrupts
Trap Vectors ............................................................... 86
Vector Tables.............................................................. 86
J
JTAG Interface .................................................................. 344
K
Key Features..................................................................... 329
 2016 Microchip Technology Inc.
L
Low-Voltage/Retention Regulator..................................... 341
M
Memory Organization ......................................................... 41
Program Memory Space............................................. 41
Microchip Internet Web Site.............................................. 407
MPLAB ASM30 Assembler, Linker, Librarian ................... 346
MPLAB Integrated Development
Environment Software .............................................. 345
MPLAB PM3 Device Programmer .................................... 347
MPLAB REAL ICE In-Circuit Emulator System ................ 347
MPLINK Object Linker/MPLIB Object Librarian ................ 346
N
Near Data Space ................................................................ 46
O
On-Chip Voltage Regulator............................................... 341
POR.......................................................................... 341
Standby Mode .......................................................... 341
Oscillator Configuration ...................................................... 97
Clock Switching ........................................................ 106
Sequence ......................................................... 106
Configuration Bit Values for Clock Selection .............. 99
Control Registers........................................................ 99
Initial Configuration on POR ....................................... 98
Modes....................................................................... 108
Output Compare with Dedicated Timers........................... 173
Operating Modes ...................................................... 173
32-Bit Cascaded Mode ..................................... 173
Synchronous and Trigger Modes ..................... 173
Operations ................................................................ 174
P
Packaging
Details....................................................................... 377
Marking..................................................................... 375
Peripheral Enable Bits ...................................................... 115
Peripheral Module Disable Bits......................................... 115
Peripheral Pin Select (PPS).............................................. 136
Available Peripherals and Pins................................. 136
Configuration Control................................................ 139
Considerations for Selection..................................... 140
Control Registers...................................................... 141
Input Mapping........................................................... 137
Mapping Exceptions ................................................. 139
Output Mapping ........................................................ 138
Peripheral Priority ..................................................... 136
Selectable Input Sources.......................................... 137
Selectable Output Sources....................................... 138
PIC24FJ256GA705 Family Pinout Descriptions ................. 20
Pin Descriptions
28-Pin QFN, UQFN Devices......................................... 3
28-Pin SOIC, SSOP, SPDIP Devices ........................... 4
44-Pin TQFP Devices................................................... 6
48-Pin TQFP Devices................................................. 10
48-Pin UQFN Devices .................................................. 8
Power-Saving Features .................................................... 113
Clock Frequency, Clock Switching ........................... 113
Doze Mode ............................................................... 115
Instruction-Based Modes.......................................... 113
Idle.................................................................... 114
Sleep ................................................................ 113
Low-Voltage Retention Regulator............................. 114
Selective Peripheral Module Control ........................ 115
DS30010118B-page 403